RMLV0816BGSD-4S2#AC0 vs RMLV0816BGSD-4S2 Vergleich

Detaillierter Direktvergleich von RMLV0816BGSD-4S2#AC0 von Renesas Electronics und RMLV0816BGSD-4S2 von Renesas Electronics. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Renesas Electronics
RMLV0816BGSD-4S2#AC0 RMLV0816BGSD-4S2#AC0 - 8Mb Advanced LPSRAM | Renesas | TSOP-II 52

RMLV0816BGSD-4S2#AC0 - 8Mb Advanced LPSRAM | Renesas | TSOP-II 52

RMLV0816BGSD-4S2#AC0 ✓ Aktiv
Renesas Electronics
RMLV0816BGSD-4S2 RMLV0816BGSD-4S2 - 8Mb Low-Power SRAM 512Kx16 45ns TSOP | Renesas

RMLV0816BGSD-4S2 - 8Mb Low-Power SRAM 512Kx16 45ns TSOP | Renesas

RMLV0816BGSD-4S2 ✓ Aktiv

Spezifikationsvergleich

Parameter RMLV0816BGSD-4S2#AC0 RMLV0816BGSD-4S2
Marke Renesas Electronics Renesas Electronics
Kategorie Memory ICs Memory ICs
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $3,78 $2,50
Speichertyp Volatile SRAM (LPSRAM) Static RAM (SRAM), Asynchronous
Speichergröße 8 Mbit —
Speicherorganisation 524,288-word × 16-bit (configurable to 1M × 8) 524,288-word x 16-bit (512K x 16)
Bus Width Parallel, 8-bit or 16-bit —
Schnittstellentyp Parallel (asynchronous) —
Access Time 45 ns 45 ns
Supply Voltage (VCC) 2.4 V to 3.6 V 2.7 V to 3.6 V
Betriebstemperaturbereich -40 °C to +85 °C -40 C to +85 C (industrial)
Package Type 52-TSOP II —
Montageart Surface Mount Surface Mount
Process Technology Renesas Advanced LPSRAM CMOS Renesas Advanced LPSRAM CMOS
Ausgangskonfiguration Three-state (with OE# control) —
Byte Control UB# (upper byte), LB# (lower byte) /LB and /UB (lower/upper byte enable)
Write Control WE# (active-low) —
Chip Enable CE# (active-low) —
MSL-Level MSL3 (per JEDEC J-STD-020, where stated in the datasheet) 3 (per JEDEC J-STD-020, typical for TSOP-II)
RoHS-Status Compliant Compliant
Data Retention Voltage (typical) 2.0 V [DATA_NEEDED: confirm from datasheet retention section] —
Memory Subcategory — Low-Power SRAM (LPSRAM)
Memory Density — 8 Mbit
Schnittstelle — Parallel (asynchronous)
Gehäuse — 52-pin TSOP-II
Output Enable (/OE) — Yes
Write Enable (/WE) — Yes
Chip Select (/CS) — Yes
I/O Compatibility — TTL-compatible
Standby Current — [DATA_NEEDED: standby current]
Active Current — [DATA_NEEDED: operating current]

Datenblätter & Ressourcen

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