RTAX250SL-CG624E vs RTAX250S-CG624E Vergleich

Detaillierter Direktvergleich von RTAX250SL-CG624E von Microchip Technology und RTAX250S-CG624E von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Microchip Technology
RTAX250SL-CG624E RTAX250SL-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250SL-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250SL-CG624E ✓ Aktiv
Microchip Technology
RTAX250S-CG624E RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250S-CG624E ✓ Aktiv

Spezifikationsvergleich

Parameter RTAX250SL-CG624E RTAX250S-CG624E
Marke Microchip Technology Microchip Technology
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $1.375,00 $0,00
Family RTAX-S/SL Radiation-Tolerant FPGA RTAX-S radiation-tolerant FPGA
System Gates 250000 250000 gates
Logic Cells (CLBs) 2816 2816
Maximum Frequency 649 MHz —
Process Technology 0.15 um CMOS 0.15 um CMOS
Core Supply Voltage 1.5 V 1.5 V
Supply Voltage Tolerance +/-0.15 V —
Maximum Combinatorial Delay 0.93 ns —
Gehäuse 624-Pin CCGA (Ceramic Column Grid Array) —
Betriebstemperatur -55C to +125C -55C to +125C
Logic Family CMOS CMOS
Radiation Tolerance SEU-hardened registers; SEU rate < 10-10 errors/bit-day —
Embedded Memory Embedded SRAM with built-in FIFO control logic —
Clocking Segmentable clocks, chip-wide highway routing —
Montageart Surface Mount Surface Mount
RoHS-Status [DATA_NEEDED: RoHS status] —
Programmability Live at power-up, true single-chip —
Maximum Toggle Frequency — 649 MHz
CLB Combinatorial Delay (max) — 0.930 ns
Package Type — CCGA-624 (ceramic column grid array, 624 pins)
Programming Technology — Antifuse (one-time programmable)
SEU Hardening — SEU-hardened registers, no external TMR required
SEU Immunity — Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day
Power-Up Behavior — Live at power-up (true single-chip)
Target Application — Space-flight systems

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