XPC8260CVVIFBC vs MPC8260AZUPJDB Vergleich
Detaillierter Direktvergleich von XPC8260CVVIFBC von NXP Semiconductors und MPC8260AZUPJDB von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
XPC8260CVVIFBC - 200MHz PowerQUICC II G2 MPU | NXP | Network/Telecom
XPC8260CVVIFBC ✓ AktivNXP Semiconductors
MPC8260AZUPJDB - 300MHz PowerQUICC II HiP4 MPU | NXP
MPC8260AZUPJDB ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | XPC8260CVVIFBC | MPC8260AZUPJDB |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Aktiv | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $219,50 | $165,00 |
| Processor Type | PowerPC G2 Microprocessor IC MPC82xx (PowerQUICC II) | — |
| Core Architecture | PowerPC G2, 1 Core, 32-Bit | — |
| CPU Clock Speed | 200 MHz | — |
| Core Supply Voltage | 2.5 V | 1.9 V to 2.2 V |
| Communications Processor Module (CPM) | Integrated (per PowerQUICC II architecture) | Integrated (FCC, SCC, SMC) |
| Gehäuse / Bauform | 480-LBGA (TBGA), 37.5 x 37.5 mm | — |
| Terminal Form | Ball | — |
| Number of Terminals | 480 | — |
| Package Body Material | Plastic / Epoxy | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Packaging | Tray | Tray |
| Manufacturer Lifecycle Source | NXP Semiconductors (Freescale/Motorola legacy) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | unknown |
| Lead Free | [DATA_NEEDED: lead-free status] | — |
| Series | PowerQUICC II (PQ II HIP 3) | PowerQUICC II (MPC8260A HiP4) |
| Manufacturer | — | NXP Semiconductors |
| Core | — | PowerPC G2, single core |
| Datenbusbreite | — | 32-bit |
| Maximale Taktfrequenz | — | 300 MHz |
| L1 Instruction Cache | — | 32 KB |
| L1 Data Cache | — | 32 KB |
| I/O Supply Voltage | — | 3.3 V |
| Process Technology | — | 0.25 micrometer CMOS (HiP4) |
| Gehäuse | — | 480-TBGA (37.5 x 37.5 mm) |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature range] |
| External Bus | — | 60x bus, 64-bit data |
| Lifecycle | — | End-of-Life / Last Time Buy (per NXP PCN) |