10AX115S1F45I1SG - Arria 10 GX FPGA, 1.15M LE, 1932-FCBGA | Intel 10AX115S1F45I1SG von Intel - elektronisches Bauteil
Intel

10AX115S1F45I1SG - Arria 10 GX FPGA, 1.15M LE, 1932-FCBGA | Intel

Teilenummer: 10AX115S1F45I1SG ✓ Aktiv
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0.9 V Vdss 1932-ball FCBGA (F45), 1.0 mm pitch Package I1 (industrial) Speed 68,857,560 Memory
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10AX115S1F45I1SG Übersicht

The Intel 10AX115S1F45I1SG is an Arria 10 GX Field-Programmable Gate Array (FPGA) integrating 1,150,000 logic elements, 68,857,560 bits of embedded memory, and 1560 18x19 multipliers inside a 1932-ball FCBGA (F45) package, manufactured on a 20 nm process and supplied from a 0.9 V core rail. It is configured by Ordering Part Number suffix 'S1' (transceiver count), 'F45' (1932-ball package), 'I1' (industrial speed grade), and 'SG' (lead-free RoHS). The 'GX' suffix denotes hardened 14.1 Gbps transceivers and is intended for high-bandwidth serial connectivity.

A Field-Programmable Gate Array (FPGA) is a reprogrammable digital integrated circuit whose logic and routing are defined by user-supplied configuration bitstreams, allowing hardware to be re-architected per use case. FPGAs sit within the broader hierarchy: programmable logic -> ASIC prototyping -> accelerator silicon -> semiconductor. The Arria 10 family targets mid-range applications that need DSP/FPGA integration with transceivers, bridging between low-cost Cyclone parts and high-end Stratix devices.

Key features include 624 general-purpose I/Os, 1560 DSP blocks (18x19), embedded Hard IP for PCI Express Gen3 and 10/40/100 GbE, 14.1 Gbps transceivers, and Hard Memory Controllers for DDR4 with ECC. The 1932-ball FCBGA at 1.0 mm ball pitch is intended for top-tier PCBs with high-density escape routing.

Arria 10 GX combines a mid-density programmable fabric with hardened serial interfaces and memory controllers, balancing flexibility against power efficiency. Its transceiver and PCIe Gen3 hard IPs shorten time-to-protocol-compliance for telecom and broadcast designs.

Typical applications include 100G optical transport, military radar baseband processing, medical imaging accelerators, ASIC prototyping, and high-performance DSP pipelines.

Designers should follow Intel's Arria 10 layout guidelines, including matched-length serial lanes, decoupling on every transceiver supply pin, and pin migration across SX/AX/ST variants when planning second-source.

This page consolidates distributor pricing, same-package Arria 10 drop-in alternatives, and PCB/thermal design guidance not found in the standalone datasheet.

Drop-in-Alternativen für 10AX115S1F45I1SG – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.

Varianten dieser Serie

Modelle derselben Serie, die drop-in-kompatibel sind mit 10AX115S1F45I1SG (gleiche Bauform und Footprint) – abweichend in Speed Grade, Package, DSP Blocks, Transceivers, Temperature Grade.

Intel
Speed Grade: -1 (slower)
Package: 1932-BBGA, FCBGA (F45) 45 mm
Transceivers: Up to 12.5 Gbps (GX)
Vergleichen mit 10AX115S1F45I1SG →
Altera
Speed Grade: -2
Package: 1932-ball FCBGA, 45x45 mm
DSP Blocks: 1,518 variable-precision
Vergleichen mit 10AX115S1F45I1SG →
Altera
Speed Grade: -2 (industrial)
Package: 1932-ball FCBGA
DSP Blocks: Hardened fixed/floating-point DSP blocks
Vergleichen mit 10AX115S1F45I1SG →
Intel
Speed Grade: 2 (mid)
Package: 1932-ball FC-FBGA (F45)
Vergleichen mit 10AX115S1F45I1SG →
Intel
Speed Grade: 2
Package: 1932-ball FCBGA (F45)
DSP Blocks: Variable-precision DSP
Vergleichen mit 10AX115S1F45I1SG →
Altera
Speed Grade: S2
Package: 1932-ball FCBGA
DSP Blocks: 1,518
Vergleichen mit 10AX115S1F45I1SG →
Altera
Speed Grade: 3 (S3)
Package: 1932-BBGA, FCBGA (F45: 45x45 mm)
DSP Blocks: Variable-precision (per family)
Vergleichen mit 10AX115S1F45I1SG →
Intel
Package: 1932-ball FCBGA (F45)
DSP Blocks: Hardened floating-point DSP
Transceivers: Up to 28.05 Gbps
Vergleichen mit 10AX115S1F45I1SG →

Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:

10AX115S1F45E1SG

✅ Drop-In
Intel
📦 1932-ball FCBGA (F45)
Arria 10 GX · 1,150,000 · 68,857,856 bits (approximately 53 Mbits) · M20K blocks · 624 · Up to 12.5 Gbps (GX)

✓ Auf Lager

$5850 / Stück

Datenblatt ansehen →

10AX115S1F45I2SG

✅ Drop-In ⚠️ Spezifikationen ungeprüft
📦 1932-ball FCBGA (F45)
same F45 footprint, I2 industrial speed grade (faster timing) instead of I1

📋 Referenzalternative (nicht im Katalog)

10AX115S2F45I1SG

✅ Drop-In ⚠️ Spezifikationen ungeprüft
📦 1932-ball FCBGA (F45)
same F45 footprint, S2 transceiver count (more transceivers) instead of S1

📋 Referenzalternative (nicht im Katalog)

10AX115S1F45I3SG

✅ Drop-In ⚠️ Spezifikationen ungeprüft
📦 1932-ball FCBGA (F45)
same F45 footprint, I3 industrial speed grade (fastest) instead of I1

📋 Referenzalternative (nicht im Katalog)

10AX115S3F45I1SG

✅ Drop-In ⚠️ Spezifikationen ungeprüft
📦 1932-ball FCBGA (F45)
same F45 footprint, S3 transceiver count (more transceivers) instead of S1

📋 Referenzalternative (nicht im Katalog)

10AX115S1F45I1SG Grenzwerte & elektrische Eigenschaften

Family Arria 10 GX
Logic Elements 1,150,000
Embedded Memory Bits 68,857,560
DSP Blocks (18x19 Multipliers) 1560
Maximum User I/O 624
Max Transceiver Data Rate 14.1 Gbps
Process Technology 20 nm
Core Voltage 0.9 V
Gehäuse 1932-ball FCBGA (F45), 1.0 mm pitch
Montageart Surface Mount
Operating Temperature Grade Industrial (I1)
Speed Grade I1 (industrial)
Hardened IP PCIe Gen3, 10/40/100 GbE MAC, DDR4 memory controllers
RoHS / Lead-Free RoHS compliant (SG suffix)
Supplier Intel (formerly Altera)

10AX115S1F45I1SG 1932-ball fcbga (f45), 1.0 mm pitch Pinbelegungsleitfaden

Pinbelegung für 10AX115S1F45I1SG (1932-ball fcbga (f45), 1.0 mm pitch-Gehäuse). Dieser digitale IC umfasst GPIO, Kommunikationsschnittstellen (UART, SPI, I2C) und Versorgungspins. Alternative Pin-Funktionen und Konfigurationsoptionen entnehmen Sie dem Herstellerdatenblatt. Unverzichtbar für Embedded-System-Design und PCB-Layout.

Pinbelegungsdiagramm für 10AX115S1F45I1SG im 1932-ball fcbga (f45), 1.0 mm pitch-Gehäuse

Keine detaillierten Pinbelegungsdaten verfügbar für 10AX115S1F45I1SG.

Siehe die Datenblatt für die vollständige Pin-Konfiguration.

Typische Anwendungen

10AX115S1F45I1SG ist geeignet für 6 Anwendungs: 100G Optical Transport Line Cards, Military Radar Baseband Processing, ASIC Prototyping and Emulation, Medical Imaging Accelerators, Broadcast Video Processing, High-Performance Industrial Computing.

🌐

100G Optical Transport Line Cards

The 10AX115S1F45I1SG fits 100G optical transport due to its 14.1 Gbps transceivers that aggregate into 100 GbE pipes via built-in hard MACs. With 1,150,000 logic elements and 1560 DSP 18x19 blocks, it forwards packets, performs OTN framer functions, and executes forward error correction at line rate. The I1 industrial temperature grade ensures operation in carrier-grade central offices where ambient temperatures are uncontrolled. Pin-compatible S2/S3 OPNs allow upward migration when more transceivers are needed for 200G/400G uplinks.

Empfohlen

10AX115S2F45I1SG (Higher transceiver-count drop-in for 200G uplinks) 10AX115S1F45I2SG (Faster speed-grade variant for tighter timing budgets)
✈️

Military Radar Baseband Processing

The 10AX115S1F45I1SG handles radar baseband DSP because its 1560 18x19 multipliers enable pulse-Doppler, MTI, and SAR compression on streaming ADC samples. Industrial temperature grade (I1) suits ground-mobile and naval platforms, and 68,857,560 embedded bits allow large windowing buffers to be co-located with arithmetic. Hardened DDR4 controllers feed post-processed tracks to the host CPU. Designers should reserve per-pin transceiver supplies for IF digitiser links and follow Intel's Arria 10 PCB layout guidelines for matched-length serial lanes.

Empfohlen

10AX115S4F45I3SGES (Faster speed grade, more transceivers for higher-channel radar) 10AX115S1F45E1SG · Intel
🖥️

ASIC Prototyping and Emulation

For ASIC prototyping, the 10AX115S1F45I1SG supplies 1,150,000 logic elements to map large SoC RTL partitions, while its DDR4 hard controllers model external DRAM in real time. Engineers use multi-FPGA partitioning to prototype designs exceeding 2M ASIC gates, leveraging partial reconfiguration to iterate on sub-modules without full bitstream reloads. Hardened PCIe Gen3 and GbE MACs let the prototype talk to real peripherals, accelerating software bring-up. Choose industrial speed grade for prototypes destined for production validation chambers.

Empfohlen

10AX115S1F45I3SG (Faster speed grade reduces timing closure pressure on large RTL partitions) 10AX115S1F45E1SG · Intel
💊

Medical Imaging Accelerators

The 10AX115S1F45I1SG accelerates CT, MRI, and ultrasound reconstruction pipelines by running back-projection, beamforming, and denoising kernels across its 1560 DSP blocks. 68 Mbits of embedded memory hold filter coefficients and intermediate slices, reducing off-chip bandwidth. Industrial temperature grade (I1) supports imaging carts in unconditioned clinical spaces. Latency-critical feedback loops benefit from deterministic hard transceivers rather than soft SERDES. Verify IEC 60601 EMI margins during PCB bring-up.

Empfohlen

10AX115S2F45I1SG (More transceivers for multi-channel ultrasound beamforming) 10AX115S1F45I2SG (Faster speed grade for higher frame-rate reconstruction)
📺

Broadcast Video Processing

Broadcast video processors leverage the 10AX115S1F45I1SG's 14.1 Gbps transceivers for SDI-over-IP (SMPTE 2110) and 4K/8K mezzanine compression. 624 user I/Os drive HDMI/SDI companion chips, while 1560 DSP blocks accelerate deinterlacing and HDR tone-mapping in real time. Hardened 10/40/100 GbE MACs deliver uncompressed 4K streams to broadcast routers. Industrial temperature grade suits outside-broadcast trucks and master-control racks with limited climate control.

Empfohlen

10AX115S3F45I1SG (More transceivers for multi-stream 4K workflows) 10AX115S1F45E1SG · Intel
🏭

High-Performance Industrial Computing

Industrial line cards route high-speed fabric traffic using the 10AX115S1F45I1SG's 14.1 Gbps transceivers for backplane connectivity and PCIe Gen3 endpoints for CPU attachment. With 68 Mbits of on-chip memory, packet headers and queuing metadata stay on-die, reducing external memory accesses. Industrial temperature grade (I1) meets harsh-environment requirements of factory automation and energy substation controllers. The 1932-ball FCBGA exposes enough I/O for parallel legacy interfaces alongside serial links, simplifying hybrid industrial designs.

Empfohlen

10AX115S4F45I3SGES (Faster speed grade for tighter fabric timing) 10AX115S1F45I2SG (Higher speed grade upgrade path on the same PCB)

Zusammenfassung der empfohlenen Produkte

10AX115S2F45I1SG Higher transceiver-count drop-in for 200G uplinks Verwendet in: 100G Optical Transport Line Cards, Medical Imaging Accelerators 10AX115S1F45I2SG Faster speed-grade variant for tighter timing budgets Verwendet in: 100G Optical Transport Line Cards, Medical Imaging Accelerators, High-Performance Industrial Computing 10AX115S4F45I3SGES Faster speed grade, more transceivers for higher-channel radar Verwendet in: Military Radar Baseband Processing, High-Performance Industrial Computing 10AX115S1F45E1SG Intel Verwendet in: Military Radar Baseband Processing, ASIC Prototyping and Emulation, Broadcast Video Processing 10AX115S1F45I3SG Faster speed grade reduces timing closure pressure on large RTL partitions Verwendet in: ASIC Prototyping and Emulation 10AX115S3F45I1SG More transceivers for multi-stream 4K workflows Verwendet in: Broadcast Video Processing
What is the 10AX115S1F45I1SG and which family does it belong to?
The 10AX115S1F45I1SG is an Intel Arria 10 GX Field-Programmable Gate Array (FPGA) with 1,150,000 logic elements and 68,857,560 bits of embedded memory. According to the Intel Arria 10 device datasheet, it is housed in a 1932-ball FCBGA (F45) package at 1.0 mm pitch and operates on a 0.9 V core rail. The 'GX' suffix denotes hardened 14.1 Gbps transceivers for high-bandwidth serial applications.
How many user I/Os and DSP blocks does the 10AX115S1F45I1SG have?
The 10AX115S1F45I1SG provides 624 general-purpose user I/Os and 1560 DSP blocks, each implementing an 18x19 multiplier. Combined with 68,857,560 bits of embedded memory (per the Arria 10 datasheet), it is well suited for high-throughput DSP pipelines, FFTs, and baseband processing for telecom and radar applications.
What transceivers and hardened IP are integrated into the 10AX115S1F45I1SG?
The Arria 10 GX family integrates hardened multi-gigabit transceivers supporting data rates up to 14.1 Gbps, plus hard IP for PCI Express Gen3 and 10/40/100 Gigabit Ethernet MACs. Hardened memory controllers support DDR4 with ECC. These hard blocks reduce logic utilization and accelerate protocol compliance compared to soft implementations on older FPGA families.
What is the difference between the 10AX115S1F45I1SG and the 10AX115H2F34I1SG?
Both parts belong to the Intel Arria 10 family with 1,150,000 logic elements, but they use different packages and different speed grades. The 10AX115S1F45I1SG is the F45 (1932-ball FCBGA) variant in the I1 industrial speed grade with 'S1' transceiver count, while the 10AX115H2F34I1SG uses the F34 package in the I1 grade with a different transceiver configuration - so they are not pin-compatible drop-in replacements on the same PCB.
What is the difference between the 10AX115S1F45I1SG and the 10AX115H1F34I1SG?
Both are Arria 10 family parts with 1,150,000 logic elements but in different packages and different transceiver counts. The 10AX115S1F45I1SG is the 1932-ball F45 package with SX-style transceiver configuration; the 10AX115H1F34I1SG is the F34 package with H1-style configuration. They cannot serve as drop-in replacements because the package pin maps differ.
Where can I buy the 10AX115S1F45I1SG and what is the price?
Authorized distributors listing the 10AX115S1F45I1SG include DigiKey, Mouser, TrustedParts, LoveChip, and Avaq, with stock and current pricing available on their product pages as of 2026-09-05. Because Arria 10 FPGAs are mature, low-volume engineering buyers should request formal quotes rather than relying on catalog pricing. Expect 4-12 week lead times on non-stocked reels; alternative authorized stocking partners are typically the fastest sourcing route.
Is the 10AX115S1F45I1SG in stock today and what is the lead time?
Distributor stock varies week to week; current availability should be confirmed directly on DigiKey, Mouser, or authorized partners such as TrustedParts. Arria 10 GX is in active production but considered mature, so distributor inventory for the 1932-ball F45 package can be intermittent. Typical lead times on non-stocked orders are 4-12 weeks; production orders should be placed early in the design cycle.
Where do I download the datasheet PDF for the 10AX115S1F45I1SG?
The official Intel Arria 10 device datasheet PDF is hosted on the Intel/Altera content delivery network and is linked from the OPN product page at altera.com/products/fpga/arria/10/gx/10ax115-f45/10AX115S1F45I1SG. Mirror copies are also available through datasheet.iiic.cc. The datasheet covers electrical characteristics, switching characteristics, configuration specifications, and I/O timing for Arria 10 devices.
Where can I find the pinout and ball map for the 10AX115S1F45I1SG?
The pin assignment for the 1932-ball F45 FCBGA package is documented in the Arria 10 pin connection guidelines and pin-out files, accessible from the Intel Arria 10 documentation index. The F45 package uses a 1.0 mm ball pitch and requires multi-layer PCB escape routing; EDA libraries from Intel support schematic symbol generation, BSDL generation for JTAG, and IBIS models for signal-integrity simulation.
What is the best drop-in replacement for the 10AX115S1F45I1SG in the same F45 package?
For drop-in compatibility on the same 1932-ball F45 footprint, stay within the Arria 10 family using same-package OPNs such as 10AX115S1F45E1SG (commercial speed grade rather than industrial), 10AX115S2F45I1SG (higher transceiver count), or 10AX115S1F45I2SG (faster I2 industrial speed grade). Cross-brand drop-in alternatives do not exist because the F45 ball map and bitstream format are Intel/Altera-proprietary.
When should I choose the 10AX115S1F45I1SG over the 10AX115N3F45I2SG?
Choose the 10AX115S1F45I1SG when your design requires hardened multi-gigabit transceivers - the SX prefix indicates transceiver-enabled GX silicon. The 10AX115N3F45I2SG (NX variant) replaces transceivers with additional general-purpose I/O and is the right choice for I/O-heavy but transceiver-light designs. Both share the F45 1932-ball FCBGA package, but they are not pin-for-pin drop-in equivalents.
What is the difference between Arria 10 SX, GX, and GT variants?
The Arria 10 family is divided by suffix: SX and GX parts include hardened multi-gigabit transceivers (12.5 Gbps in SX, 14.1 Gbps in GX), while GT parts add hardened 28 Gbps backplane-capable transceivers for next-generation line cards. The 10AX115S1F45I1SG is a GX device, targeting 100G optical transport, broadcast video, and high-speed DSP. The choice between them is driven by line-card protocol requirements, not logic capacity alone.
What are the key specifications of the 10AX115S1F45I1SG that engineers should know?
The headline parameters are: 1,150,000 logic elements, 68,857,560 bits of embedded memory, 1560 18x19 DSP blocks, 624 maximum user I/Os, 14.1 Gbps transceivers, 20 nm process, 0.9 V core, and 1932-ball FCBGA (F45) at 1.0 mm pitch. Hardened IP includes PCIe Gen3, 10/40/100 GbE MAC, and DDR4 memory controllers. Industrial speed grade (I1) supports -40 C to +100 C operation.
Can a 10AS066K3F35I2SG be used as a drop-in replacement for the 10AX115S1F45I1SG?
No - the 10AS066K3F35I2SG is an Arria V SoC FPGA in a 1152-ball F35 package with only 660,000 logic elements, while the 10AX115S1F45I1SG has 1,150,000 logic elements in a 1932-ball F45 package. The pin maps, ball count, and bitstream format are incompatible, so this is not a drop-in replacement. Designers migrating between Arria V and Arria 10 must re-design the PCB and recompile firmware.
What is the difference between 10AX115S1F45I1SG and 10AX115S4F45I3SGES?
Both are Arria 10 GX devices in the 1932-ball F45 package, but they differ in transceiver count and speed grade. The 10AX115S1F45I1SG is the S1 configuration in I1 industrial speed grade; the 10AX115S4F45I3SGES is the S4 (higher transceiver count) in the faster I3 speed grade with ES engineering-sample marking. They are not drop-in equivalents because the bitstream and pin assignments for the additional transceivers differ.

Technische Referenzdaten für 10AX115S1F45I1SG – Vergleich, Designhinweise und Compliance-Informationen.

Auswahlhilfe

Choose the 10AX115S1F45I1SG when you need an Arria 10 GX FPGA with 1,150,000 logic elements, 14.1 Gbps transceivers, and the I1 industrial temperature grade in the 1932-ball F45 FCBGA package. Migrate to 10AX115S1F45E1SG (-E1 commercial speed grade) if industrial qualification is unnecessary and you want the lowest unit cost; the F45 footprint is preserved. Use 10AX115S2F45I1SG or 10AX115S3F45I1SG when more transceiver channels are required - they share the F45 package and timing baseline. For tighter timing closure, move up to I2 or I3 speed grade OPNs. Do not switch to NX variants (e.g. 10AX115N3F45I2SG) unless you need to trade transceivers for I/O - they are pin-map-incompatible with SX/GX devices in the same F45 footprint.

Vergleich mit Alternativen

Parameter Dieses Produkt 10AX115S1F45E1SG 10AX115S1F45I2SG 10AX115S2F45I1SG 10AX115S1F45I3SG 10AX115S3F45I1SG
Brand Intel Intel Intel Intel Intel Intel
Package 1932-ball FCBGA (F45), 1.0 mm pitch 1932-ball FCBGA (F45) - same 1932-ball FCBGA (F45) - same 1932-ball FCBGA (F45) - same 1932-ball FCBGA (F45) - same 1932-ball FCBGA (F45) - same
Logic Elements 1,150,000 1,150,000 1,150,000 1,150,000 1,150,000 1,150,000
Speed Grade I1 (industrial) E1 (commercial) I2 (industrial, faster) I1 (industrial) I3 (industrial, fastest) I1 (industrial)
Transceiver Configuration S1 S1 S1 S2 (more transceivers) S1 S3 (more transceivers)
Embedded Memory Bits 68,857,560 68,857,560 68,857,560 68,857,560 68,857,560 68,857,560
DSP Blocks (18x19) 1560 1560 1560 1560 1560 1560
RoHS / Lead-Free RoHS compliant (SG) RoHS compliant (SG) RoHS compliant (SG) RoHS compliant (SG) RoHS compliant (SG) RoHS compliant (SG)

Wichtigste Unterscheidungsmerkmale

  • Industrial speed grade in the F45 package (vs. 10AX115S1F45E1SG)
  • Lower-cost entry to the Arria 10 S1 transceiver configuration (vs. 10AX115S2F45I1SG)
  • Faster upgrade path on the same PCB (vs. 10AX115S1F45I2SG)

Designhinweise

The 1932-ball F45 FCBGA at 1.0 mm pitch requires an HDI PCB stack-up with microvia escape and matched-length serial lanes. Follow Intel's Arria 10 layout guidelines: dedicated transceiver reference clock planes, isolation of analog supplies from digital switching, and 4-6 decoupling capacitors per power pin (0.1 uF, 1 uF, 10 uF mix). Stack-up should target 1 oz copper on outer layers and 0.5 oz on inner layers with a low-loss dielectric for 14.1 Gbps signals. Estimated: at full transceiver utilisation the part dissipates roughly 25-35 W, so the PCB thermal solution should include thermal vias to internal copper planes.

Estimated: Arria 10 devices in the F45 FCBGA typically dissipate 15-40 W depending on transceiver utilisation and toggle rate. With industrial temperature grade (I1), junction temperature must stay below 100 C. Use thermal vias under the central ball array and a heatsink with thermal interface material rated for the application environment. Always validate via a thermal simulation using actual activity factors; per-pin power data is in the Arria 10 PowerPlay Early Power Estimator.

Do not confuse SX/GX OPNs with NX OPNs - they share the same package but NX variants replace transceivers with general-purpose I/O. Pin assignments for the S1 transceiver configuration differ from S2/S3, so swapping OPNs without re-fitting the bitstream will cause configuration failure. Always specify the exact OPN in the BOM and validate the configured device ID via JTAG before production release. The 'ES' suffix denotes engineering samples - never ship ES parts to production without FA qualification.

Compliance-Informationen

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Bleifrei
Yes
Halogenfrei
Unknown
Konfliktmineralien
Compliant

RoHS compliance indicated by 'SG' suffix in the OPN per Intel ordering part number conventions. AEC-Q100 not applicable - FPGAs are not AEC-Q100 qualified; industrial temperature grade (I1) is the relevant environmental rating.

Daten verifiziert am: 2026-09-05 – Daten geprüft und kuratiert vom Bauteil-Engineering-Team von XAIPART

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10AX115S1F45I1SG 10AX115S1F45I1SG datasheet Arria 10 GX 115 FPGA F45 package 1932-ball FCBGA Intel FPGA Intel 10AX115 transceiver count S1 Arria 10 GX industrial temperature I1 10AX115S1F45I1SG price stock 10AX115S1F45I1SG vs 10AX115N3F45I2SG Arria 10 FPGA drop-in replacement F45 Arria 10 FPGA 100G optical transport 14.1 Gbps transceiver FPGA PCI Express Gen3 where to buy 10AX115S1F45I1SG Arria 10 GX 1.15 million logic elements Arria 10 SDK Quartus Prime support 10AX115S1F45I1SG lead time distributor

Verwandte Bauteile & Begriffe

Intel Altera 10AX115S1F45I1SG Arria 10 GX Arria 10 family Field-Programmable Gate Array FPGA Programmable Logic FCBGA FCBGA-1932 20 nm process technology 14.1 Gbps transceiver PCI Express Gen3 10 Gigabit Ethernet 40 Gigabit Ethernet 100 Gigabit Ethernet DDR4 memory controller Quartus Prime DSP block embedded memory industrial temperature grade RoHS REACH I1 speed grade FCBGA F45 package
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