PN7160A1HN - NFC Plug & Play Controller, NCI 2.0 | NXP
Teilenummer: PN7160A1HN ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $4.39 | $4,39 |
| 10 | $3.95 | $39,50 |
| 100 | $3.52 | $352,00 |
| 500 | $2.95 | $1.475,00 |
| 1.000 | $2.43 | $2.430,00 |
| 3.000 | $2.15 | $6.450,00 |
PN7160A1HN Übersicht
What is an NFC controller? An NFC (Near Field Communication) controller is a contactless interface IC that drives an external antenna to communicate with tags, smartcards, and peer devices at 13.56 MHz. Compared to a bare RFID frontend, an NFC controller stacks an integrated ARM core + NCI firmware on top of the RF transceiver, exposing only a standardized host interface. NFC controllers sit within the broader hierarchy: NFC controller -> contact/contactless combo IC -> secure element -> NFC Forum-certified modules. NXP's PN7160 family specifically adds Plug & Play behavior so the host reads device descriptors and capability lists automatically, accelerating Linux/Android integration.
Key features of the PN7160A1HN include I2C address 0x28 (hardware-fixed), support for card emulation, peer-to-peer, and reader/writer modes, automatic RF field detection with low-power polling down to a few microamps, and broadcast of NDEF message Type 2/3/4/5 tags. The integrated ARM Cortex-M0 executes NXP's NCI 2.0 firmware directly from internal ROM, removing external flash requirements and shortening design-in time. The I2C bus can be reconfigured to SPI through EEPROM settings.
Technically, the PN7160A1HN combines an RF analog front end (with sub-1% carrier amplitude stability for card-emulation stability), a digital protocol engine that handles framing, CRC, and anti-collision per ISO 14443-3, and an embedded Cortex-M0 running the NCI stack. Differential TX outputs and two RX inputs drive a passive matched network; an external balun is not needed. Internal LDO blocks keep the analog, RF, and digital rails isolated for maximum PSRR on the RF driver supply.
Typical applications include payment terminals, EMVCo contactless readers, NFC tablets and laptops, USB NFC dongles, smart home hubs with tap-to-pair, industrial tag readers, and access control panels. The wide 3.0 V to 5.5 V tolerant RF supply range and high output power help drive antennas through enclosures and PCBs.
Designers should place the matching network within 5 mm of the TX1/TX2/RX1/RX2 pins and keep the 27.12 MHz crystal within 2 mm of XTAL1/XTAL2 with a guarded ground ring. The I2C SDA/SCL lines need 4.7 kohm pull-ups to VCC_IO; the IRQ pin should be wired to a host GPIO that can wake the system. Decoupling capacitors must be placed tightly across VBAT, VBAT_PA, and VDDIO pins.
This page synthesizes current distributor pricing, same-package drop-in alternatives (PN7161B1HN variants, PN7150 families with different firmware), and practical PCB layout guidance not consolidated in the manufacturer datasheet, helping engineers compare the PN7160A1HN against its siblings and third-party equivalents in a single view.
Drop-in-Alternativen für PN7160A1HN – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit PN7160A1HN (gleiche Bauform und Footprint) – abweichend in Package, Function, Host Interface, Operating Temperature, Peak Reflow Temperature.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
PN7161B1HN/C100E
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PN7150B1HN/C10002Y
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PN7160A1HN/C100Y
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PN7160B1HN/C100E
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PN7360AUHN/C300R
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
NPC10011D
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
PN7160A1HN Spezifikationen (herstellerveröffentlicht)
| Product Type | NFC Plug and Play Controller |
| Operating Frequency | 13.56 MHz |
| Supported Protocols | FeliCa, ISO 14443, ISO 15693, MIFARE, NFC |
| Host Interface | I2C (default, hardware) / SPI (EEPROM-configurable) |
| NCI Version | NCI 2.0 (pre-loaded firmware) |
| Digital Supply Voltage | 1.65 V to 1.95 V (VDD) |
| Analog/RF Supply Voltage | 3.0 V to 3.6 V (VBAT, VBAT_PA) |
| I/O Supply Voltage | 1.65 V to 1.95 V (VDDIO) |
| I2C Address | 0x28 (7-bit) |
| Antenna Pins | TX1, TX2 (differential); RX1, RX2 |
| Integrated MCU Core | ARM Cortex-M0 (ROM-resident NCI firmware) |
| Operating Modes | Reader/Writer, Card Emulation (P2P), Tag Detection |
| Modes of Operation | Active, Standby, Hard Power Down, Low-Power Polling |
| Gehäuse | HVQFN-40 (6 x 6 x 0.85 mm) with Exposed Pad |
| Montageart | Surface Mount |
| Peak Reflow Temperature | 260 C (per JEDEC J-STD-020) |
| Moisture Sensitivity Level | MSL 3 |
| RoHS-Status | Compliant |
| Betriebstemperatur | -30 C to +85 C |
PN7160A1HN Pin-Konfiguration
| Pin 1 | TX2 — Differential RF output 2 to antenna |
| Pin 2 | TX1 — Differential RF output 1 to antenna |
| Pin 3 | RX1 — Differential RF input 1 from antenna matching |
| Pin 4 | RX2 — Differential RF input 2 from antenna matching |
| Pin 5 | VBAT — Analog supply (3.0 V to 3.6 V) |
| Pin 6 | VBAT_PA — RF power amplifier supply (3.0 V to 3.6 V) |
| Pin 7 | GND — Ground |
| Pin 8 | VDD — Digital core supply (1.65 V to 1.95 V) |
| Pin 9 | GND — Ground |
| Pin 10 | XTAL1 — 27.12 MHz crystal input |
| Pin 11 | XTAL2 — 27.12 MHz crystal output |
| Pin 12 | GND — Ground |
| Pin 13 | VDDIO — I/O supply (1.65 V to 1.95 V) |
| Pin 14 | IRQ — Host interrupt output (active high) |
| Pin 15 | VEN — Reset (active low enable) |
| Pin 16 | SDA — I2C data (or SPI MOSI in SPI mode) |
| Pin 17 | SCL — I2C clock (or SPI clock in SPI mode) |
| Pin 18 | INT_IN — SPI mode interrupt input (or NC in I2C mode) |
| Pin 19 | SPI_CS_N — SPI chip-select (or NC in I2C mode) |
| Pin 20 | SPI_MISO — SPI master-in-slave-out (or NC in I2C mode) |
| Pin 21 | GPIO0 — General-purpose I/O 0 |
| Pin 22 | GPIO1 — General-purpose I/O 1 |
| Pin 23 | GPIO2 — General-purpose I/O 2 |
| Pin 24 | GPIO3 — General-purpose I/O 3 |
| Pin 25 | GPIO4 — General-purpose I/O 4 |
| Pin 26 | GPIO5 — General-purpose I/O 5 |
| Pin 27 | TEST — Factory test pin (must be left floating or GND) |
| Pin 28 | AUX_LB — AUX load modulation input |
| Pin 29 | NC — Not connected (per datasheet) |
| Pin 30 | NC — Not connected (per datasheet) |
| Pin 31 | GND — Ground |
| Pin 32 | NC — Not connected (per datasheet) |
| Pin 33 | NC — Not connected (per datasheet) |
| Pin 34 | GND — Ground |
| Pin 35 | NC — Not connected (per datasheet) |
| Pin 36 | NC — Not connected (per datasheet) |
| Pin 37 | NC — Not connected (per datasheet) |
| Pin 38 | NC — Not connected (per datasheet) |
| Pin 39 | NC — Not connected (per datasheet) |
| Pin 40 | NC — Not connected (per datasheet) |
Leistungs- und thermische Eigenschaften
| Leistungsaufnahme | 1.65 V to 1.95 V (VDD) |
| Betriebstemperatur | -30 C to +85 C |
Vom Hersteller veröffentlichte Leistungs- und thermische Parameter für PN7160A1HN.
Typische Anwendungen
PN7160A1HN ist geeignet für 7 Anwendungs: EMVCo Contactless Payment Terminal, NFC-Enabled Tablet / Laptop, USB NFC Reader / Tap-To-Pair Dongle, Industrial NFC Tag Reader / Sensor Logger, Smart Home Hub / Tap-To-Pair Accessory, Access Control / Door Reader, Automotive NFC Telematics & In-Vehicle Pairing.
EMVCo Contactless Payment Terminal
The PN7160A1HN's NCI 2.0 host interface, integrated ARM Cortex-M0 with pre-loaded firmware, and 13.56 MHz RF frontend make it an ideal drop-in NFC frontend for EMVCo Level 1 certified payment terminals. With three voltage rails (1.8 V digital, 3.3 V analog/RF) and a hardware-fixed I2C address 0x28, the controller simplifies the host-side integration on Linux or Android POS platforms while still exposing Reader/Writer, Card Emulation, and P2P modes simultaneously for adaptive contactless behavior. Placed between the host SoC's I2C bus and the matching network feeding the contactless antenna, it delivers carrier-stability tolerance and differential TX outputs that pass EMVCo field-strength tests without an external balun. Design note: When targeting EMVCo payment, choose the PN7161B1HN variant which adds an integrated secure element in the same HVQFN-40 footprint.
Empfohlen
NFC-Enabled Tablet / Laptop
Inside NFC-enabled tablets, laptops, and 2-in-1 PCs, the PN7160A1HN handles wire-free pairing with Bluetooth peripherals, smart-card sign-in, and contactless payment authentication via the operating system's standard NFC stack. The integrated NCI 2.0 firmware means the host driver is purely user-space, eliminating proprietary kernel modules and shortening time-to-market for Windows 11, Android, and ChromeOS platforms. The HVQFN-40 (6 x 6 mm) footprint and 3.0 V to 3.6 V RF supply let designers route the matching network through a multi-layer motherboard and still maintain compliance. The low-power polling mode (under a few microamps) makes it well-suited to battery-form-factor tablets without sacrificing tap-responsiveness, and the I2C IRQ pin can wake the host SoC on field detection.
Empfohlen
USB NFC Reader / Tap-To-Pair Dongle
External USB NFC readers, SD card-style NFC dongles, and tap-to-pair accessories benefit from the PN7160A1HN's plug-and-play NCI model: the host sees a standardized interface regardless of the underlying protocol, so one host driver drives IS014443 Type A/B, FeliCa, MIFARE, and ISO 15693 simultaneously. The 40-pin HVQFN-40 package is small enough to fit a sub-50 mm PCB, and the +3.0 V to +3.6 V analog supply is fed directly from USB via a single LDO without sequencing complications. Designers typically use a S912X series or S9S08 host MCU on a companion chip or a stand-alone Cortex-M0 bridge, with the controller's active-high IRQ pin driving an attached LED for human-readable tap feedback.
Empfohlen
Industrial NFC Tag Reader / Sensor Logger
In industrial environments, the PN7160A1HN serves as the heart of NFC-based wireless sensor loggers, parameter setup tools, and traceability scanners that read ISO 15693 Vicinity tags on production parts. Its wide operating temperature range of -30 C to +85 C and robust HVQFN-40 plastic packaging tolerate factory-floor conditions including vibration and reflow soldering. The differential TX1/TX2 outputs deliver enough RF power to drive an antenna through a metal enclosure, allowing compact PDA-style scanners and panel-mount HMIs to read tags without contact failures. Combined with NXP's NCI 2.0 polling algorithm, the PN7160A1HN achieves sub-second inventory of 30+ tags in field, ideal for production-line traceability.
Empfohlen
Smart Home Hub / Tap-To-Pair Accessory
Smart-home hubs, smart speakers, and connected appliances use the PN7160A1HN for tap-to-pair with smartphones, BLE/Wi-Fi credential handoff, and one-touch Wi-Fi onboarding via standardized NDEF exchange. The integrated NCI firmware executes the entire pairing sequence within the embedded Cortex-M0, so the host application processor only receives a single high-level 'tap happened' event via I2C IRQ, saving MIPS on constrained IoT gateways. The plug-and-play descriptor-based enumeration means Linux-based hubs can complete NFC initialization in 200 ms at most, making tap pairing feel instantaneous. Designers should reserve 4-layer PCB ground stitching around the antenna traces and use 50 ohm controlled-impedance routing on the TX1/TX2 differential pair for optimal link.
Empfohlen
Access Control / Door Reader
The PN7160A1HN is used in contactless door readers, time-and-attendance terminals, and elevator floor-selection panels where it reads employee ID badges, mobile credentials, and multi-protocol cards over a single RF path. The simultaneous Reader/Writer and Card Emulation support allows credential handoff to mobile wallets (Apple/Google Wallet) and MIFARE DESFire cards with no firmware change, dramatically simplifying the credential-issuance pipeline. Its 13.56 MHz carrier stability and low RX sensitivity threshold ensure reads work through plastic key fobs, wallets, and metalized smart cards - critical in high-traffic access control. The +3.0 V to +3.6 V supply permits direct battery or PoE-derived power without level shifting on the analog rail.
Empfohlen
Automotive NFC Telematics & In-Vehicle Pairing
Inside vehicle infotainment, the PN7160A1HN enables NFC-based phone pairing, digital car key entry (when paired with an automotive-grade secure element), and automotive diagnostics via NFC-Bluetooth handoff. Although not AEC-Q100 qualified itself, the family variant NPC10011D in the same HVQFN-40 footprint brings automotive qualification for -40 C to +105 C operation, allowing PCB reuse between consumer and automotive product lines. The controller's ARM Cortex-M0 executes NCI autonomously, so the in-vehicle head unit's I2C port can be assigned to a discrete NFC-capable address without burdening the main telematics SoC. Designers must add ESD protection on the antenna lines per IEC 61000-4-2 to survive the automotive environment.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für PN7160A1HN – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | PN7161B1HN/C100E | PN7150B1HN/C10002Y | PN7160A1HN/C100Y | PN7160B1HN/C100E | PN7360AUHN/C300R | NPC10011D |
|---|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | HVQFN-40 (6 x 6 mm) | HVQFN-40 (6 x 6 mm) - same | HVQFN-40 (6 x 6 mm) - same | HVQFN-40 (6 x 6 mm) - same | HVQFN-40 (6 x 6 mm) - same | HVQFN-40 (6 x 6 mm) - same | HVQFN-40 (6 x 6 mm) - same |
| NCI Firmware Version | NCI 2.0 | NCI 2.0 + secure element | NCI 1.x (older) | NCI 2.0 (same die) | NCI 2.0 (newer revision) | NCI 2.0 + security MCU | NCI 2.0 automotive |
| Integrated Secure Element | No | Yes (payment-grade SE) | No | No | No | Yes (security MCU) | No |
| Operating Temperature | -30 C to +85 C | -30 C to +85 C | -30 C to +85 C | -30 C to +85 C | -30 C to +85 C | -40 C to +105 C (automotive) | -40 C to +105 C (AEC-Q100) |
| Silicon Revision | A1 | B1 | B1 (PN7150 family) | A1 (same die, reel code) | B1 (newer than A1) | AU (with security) | Automotive qualified |
| Host Interface | I2C (default) or SPI | I2C (default) or SPI | I2C (default) or SPI | I2C (default) or SPI | I2C (default) or SPI | I2C (default) or SPI | I2C (default) or SPI |
Wichtigste Unterscheidungsmerkmale
- Integrated ARM Cortex-M0 with pre-loaded NCI 2.0 firmware (vs. PN7150B1HN/C10002Y)
- Plug-and-play NCI 2.0 with hardware-fixed I2C address 0x28 (vs. Discrete RF frontend (e.g., PN512 + external MCU))
- Single HVQFN-40 footprint across PN7160 / PN7161 / PN7150 / PN7360 / NPC10011D (vs. ST25R3916 (different QFN-32 footprint))
Designhinweise
Place the antenna matching network (typically a 4-component pi-network with Cser/Cpar/Cshunt and EMC filter) within 5 mm of the TX1/TX2/RX1/RX2 pins. The 27.12 MHz crystal must be placed within 2 mm of XTAL1/XTAL2 with a tight ground guard ring on the top layer. Route the I2C SDA/SCL lines as a matched pair to the connector with 4.7 kohm pull-ups to VDDIO. Estimated: differential TX trace impedance target is 50 ohm on a 4-layer FR4 stack-up (1.6 mm, er=4.3).
Place one 100 nF decoupling capacitor as close as possible to each of VBAT, VBAT_PA, VDD, and VDDIO (within 2 mm). Add a 4.7 uF bulk capacitor on VBAT and VBAT_PA near the antenna matching network to absorb transient RF current. The PN7160A1HN requires VDD and VDDIO to be present before or simultaneously with VBAT/VBAT_PA at power-up; a single 1.8 V LDO fed from the 3.3 V analog rail satisfies this naturally.
Always ground the exposed thermal pad (pin 41 internally) with at least 8 thermal vias to the inner ground plane for RF return current and thermal dissipation. Do not float the TEST pin - tie it to ground through a 0 ohm resistor or leave NC per datasheet. Ensure the I2C address 0x28 is not used by another peripheral on the host bus. Enable proper NCI 2.0 init sequence per the PN7160/PN7161 datasheet section 'Initialization and start-up' before issuing commands.
Place an LC pi-filter on the analog 3.3 V supply input (10 uH inductor + 10 uF + 100 nF capacitor) to suppress conducted emissions from the RF transmitter back to the host power rail. The PN7160A1HN's RF output contains harmonics at 27.12 MHz and 54.24 MHz that can couple into adjacent analog and digital subsystems. Add a ferrite bead on the antenna feed during EMC pre-compliance testing if needed.
In continuous card-emulation or peer-to-peer mode the PN7160A1HN dissipates approximately 0.3 W to 0.5 W depending on RF output power and matching network efficiency. Ensure at least 100 mm2 of unbroken copper pour beneath the HVQFN-40 exposed pad tied to the inner ground plane (estimated junction-to-ambient thermal resistance ~35 C/W on JEDEC EIA/JESD51 4-layer test board). For embedded designs with poor ventilation, consider derating RF output power or pulsing the RF field to stay below 70 C junction temperature.
Compliance-Informationen
RoHS compliant per NXP product page. Standard consumer-grade; PN7160A1HN is NOT AEC-Q100 qualified - choose NPC10011D for automotive. Lead-free HVQFN-40 package supports 260 C peak reflow per JEDEC J-STD-020.
