EP1M350F780I5 vs EP1M350F780C8 Comparación
Comparación detallada lado a lado de EP1M350F780I5 por Altera y EP1M350F780C8 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EP1M350F780I5 - Altera Mercury Enhanced Configuration Device, 780-pin FBGA | Intel
EP1M350F780I5 NrndComparación de especificaciones
| Parámetro | EP1M350F780I5 | EP1M350F780C8 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $178,00 | $175,00 |
| Device Family | Altera Mercury (EP1M) Enhanced Configuration Device | Altera APEX Mercury (EP1M) |
| Función | FPGA configuration PROM with integrated controller | — |
| Storage Density Code | 350 (high-density) | — |
| Supported Configuration Schemes | Passive Serial, Active Serial, Fast Passive Parallel | — |
| Internal Architecture | Configuration controller + flash memory array | — |
| Programming Method | In-system programmable via Altera Quartus / JTAG | — |
| Encapsulado | 780-ball FineLine BGA (F780) | 780-ball FineLine BGA |
| Temperature Grade (suffix "I") | Industrial | — |
| Speed Grade | 5 | C8 (commercial, speed bin 8) |
| Target FPGA Compatibility | Altera APEX 20K, APEX II, Mercury, Stratix-class high-density FPGAs | — |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| Cascade / Multi-FPGA Support | Yes, supports daisy-chained multi-FPGA boot | — |
| Read-Back | Yes | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | unknown (legacy device) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Typical Gates | — | 350,000 |
| Maximum Logic Elements (LEs) | — | 12,160 |
| Embedded RAM Blocks | — | 4 dual-port RAM blocks |
| Temperatura de funcionamiento | — | 0C to +85C (commercial) |
| Supply Voltage (Core) | — | [DATA_NEEDED: core Vcc] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards) |
| Global Clock Networks | — | 8 |
| Configuration Interface | — | IEEE 1532 / passive serial / JTAG |
| Maximum User I/O | — | [DATA_NEEDED: user I/O count] |
| In-System Programmability | — | Yes (ISP via JTAG) |
| Tipo de montaje | — | Surface Mount (BGA) |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |