EP1M350F780I5 vs EP1M350F780C8 Comparaison
Comparaison détaillée côte à côte de EP1M350F780I5 par Altera et EP1M350F780C8 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP1M350F780I5 - Altera Mercury Enhanced Configuration Device, 780-pin FBGA | Intel
EP1M350F780I5 NrndComparaison des spécifications
| Paramètre | EP1M350F780I5 | EP1M350F780C8 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $178,00 | $175,00 |
| Device Family | Altera Mercury (EP1M) Enhanced Configuration Device | Altera APEX Mercury (EP1M) |
| Fonction | FPGA configuration PROM with integrated controller | — |
| Storage Density Code | 350 (high-density) | — |
| Supported Configuration Schemes | Passive Serial, Active Serial, Fast Passive Parallel | — |
| Internal Architecture | Configuration controller + flash memory array | — |
| Programming Method | In-system programmable via Altera Quartus / JTAG | — |
| Boîtier | 780-ball FineLine BGA (F780) | 780-ball FineLine BGA |
| Temperature Grade (suffix "I") | Industrial | — |
| Speed Grade | 5 | C8 (commercial, speed bin 8) |
| Target FPGA Compatibility | Altera APEX 20K, APEX II, Mercury, Stratix-class high-density FPGAs | — |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| Cascade / Multi-FPGA Support | Yes, supports daisy-chained multi-FPGA boot | — |
| Read-Back | Yes | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | unknown (legacy device) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Typical Gates | — | 350,000 |
| Maximum Logic Elements (LEs) | — | 12,160 |
| Embedded RAM Blocks | — | 4 dual-port RAM blocks |
| Température de fonctionnement | — | 0C to +85C (commercial) |
| Supply Voltage (Core) | — | [DATA_NEEDED: core Vcc] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards) |
| Global Clock Networks | — | 8 |
| Configuration Interface | — | IEEE 1532 / passive serial / JTAG |
| Maximum User I/O | — | [DATA_NEEDED: user I/O count] |
| In-System Programmability | — | Yes (ISP via JTAG) |
| Type de montage | — | Surface Mount (BGA) |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |