EP1SGX25DF800C6N vs EP1SGX40GF800C7N Comparación
Comparación detallada lado a lado de EP1SGX25DF800C6N por Intel y EP1SGX40GF800C7N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP1SGX25DF800C6N - Stratix GX FPGA, 25K LE, 3.1875 Gbps SERDES | Intel / Altera
EP1SGX25DF800C6N ObsoleteIntel
EP1SGX40GF800C7N - Stratix GX FPGA, 41.25K LE, 800-BGA | Intel / Altera
EP1SGX40GF800C7N ObsoleteComparación de especificaciones
| Parámetro | EP1SGX25DF800C6N | EP1SGX40GF800C7N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $118,00 | $110,00 |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25,560 LEs | 41,250 |
| Maximum Transceiver Channels | 20 channels | — |
| Maximum Transceiver Data Rate | 3.1875 Gbps | — |
| Encapsulado | FBGA-780 (FineLine BGA, 800-ball per JEDEC ordering code) | 800-ball FineLine BGA (FBGA-800) |
| Process Node | [DATA_NEEDED: process node] | — |
| Core Voltage | 1.5 V | 1.5 V |
| Temperatura de funcionamiento | Commercial (0 C to +85 C) | — |
| Speed Grade | 6 | 7 (commercial, fastest) |
| Configuration Method | Passive Serial / Passive Parallel / Active Serial / JTAG | — |
| Transceiver Encoding | 8B/10B | — |
| Clock Data Recovery (CDR) | Yes, integrated per channel | — |
| Tipo de memoria | TriMatrix embedded SRAM | — |
| DSP Blocks | Yes, embedded multiplier blocks | 624 |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Estado RoHS | [DATA_NEEDED: RoHS status] | — |
| Lead Free | [DATA_NEEDED: lead free status] | — |
| Embedded Memory Bits | — | 3,423,744 bits |
| Multi-Gigabit Transceivers | — | 20 channels, up to 3.1875 Gbps |
| PLLs | — | 4 |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O count] |
| Process Technology | — | 130 nm CMOS |
| I/O Voltage | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (LVTTL/LVCMOS/LVDS) |
| Temperatura de unión de funcionamiento | — | 0C to +85C |
| Configuration Mode | — | Passive Serial / Fast Passive Parallel / Passive Parallel Asynchronous / JTAG |
| Memory Interfaces Supported | — | DDR, DDR2, QDR, RLDRAM |