EPM5128GC2 vs EPM5128LC2 Comparación
Comparación detallada lado a lado de EPM5128GC2 por Altera y EPM5128LC2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5128GC2 | EPM5128LC2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $54,00 | $22,40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | — |
| Usable Gates | 2.5K | — |
| Logic Array Blocks (LABs) | 8 (16 macro cells each) | 8 |
| Maximum Internal Frequency | 50 MHz | — |
| Supply Voltage VCC | 5 V | — |
| I/O Pins | 64 | — |
| Dedicated Inputs | 16 | — |
| Encapsulado | Ceramic PGA (GC, windowed) | PGA (Pin Grid Array, ceramic) |
| Programmable Flip-Flop Modes | D / T / JK / SR (selectable) | — |
| Architecture | AND/OR plane + programmable macro cell + PIA | — |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Reprogrammability | UV-erasable (windowed ceramic package) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (extended commercial) |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Configuration Memory | On-chip EPROM (no external boot device) | On-chip EPROM (non-volatile) |
| Recuento de pines | [DATA_NEEDED: total PGA pin count] | — |
| Macrocells | — | 128 |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Global Clock Inputs | — | 1 dedicated |
| Propagation Delay (tPD) | — | 45 ns |
| Supply Voltage (VCC) | — | 5 V |
| Boundary Scan | — | JTAG / IEEE 1149.1 |
| Tipo de montaje | — | Through-Hole / Socketed |