EPM9320LC84-20N vs EPM9320ALI84-10N Comparación
Comparación detallada lado a lado de EPM9320LC84-20N por Intel y EPM9320ALI84-10N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9320LC84-20N | EPM9320ALI84-10N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,25 | $21,95 |
| Series | MAX 9000 | — |
| Logic Family | CMOS (EEPROM-based) | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 6,000 | 6,000 to 12,000 |
| Macrocells | 320 | 320 |
| User I/Os | 60 | — |
| Número de pines | 84 | — |
| Package Type | Plastic Leaded Chip Carrier (PLCC-84, J-bend) | — |
| Package Code | QCCJ | — |
| Propagation Delay (tPD) | 16 ns | — |
| Internal Frequency | 118 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Temperatura de funcionamiento | 0 C to +70 C (Commercial) | -40C to +85C (industrial) |
| Programming | 5.0-V In-System Programmable via JTAG (IEEE 1149.1) | — |
| Tipo de montaje | Surface Mount (J-bend) | Surface Mount (PLCC socket compatible) |
| Terminal Form | J BEND | — |
| Nivel MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Family | — | MAX 9000 |
| Architecture | — | MAX (Multiple Array MatriX), 3rd generation |
| Process Technology | — | CMOS EEPROM |
| Logic Array Blocks (LABs) | — | 20 |
| User I/O Pins | — | 56 |
| Pin-to-Pin Delay | — | 10 ns |
| Maximum Counter Frequency | — | 144.9 MHz |
| VCCINT (Core Supply) | — | 5.0 V |
| VCCIO (I/O Supply) | — | 3.3 V or 5.0 V |
| Input Logic Levels | — | TTL-compatible (at 5.0 V VCCINT) |
| In-System Programmability | — | Yes (IEEE Std. 1149.1 JTAG) |
| Encapsulado | — | 84-pin PLCC (J-lead, 1.270 mm pitch) |
| Configuration Memory | — | EEPROM, non-volatile |