EPM9320LC84-20N vs EPM9320ALI84-10N 对比

详细并排对比 EPM9320LC84-20N 出自 Intel 和 EPM9320ALI84-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9320LC84-20N EPM9320ALI84-10N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 Obsolete
库存状态 有库存 有库存
单价(USD) $10.25 $21.95
Series MAX 9000 —
Logic Family CMOS (EEPROM-based) —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 6,000 6,000 to 12,000
Macrocells 320 320
User I/Os 60 —
引脚数 84 —
Package Type Plastic Leaded Chip Carrier (PLCC-84, J-bend) —
Package Code QCCJ —
Propagation Delay (tPD) 16 ns —
Internal Frequency 118 MHz —
Supply Voltage (VCC) 5 V —
工作温度 0 C to +70 C (Commercial) -40C to +85C (industrial)
Programming 5.0-V In-System Programmable via JTAG (IEEE 1149.1) —
安装类型 Surface Mount (J-bend) Surface Mount (PLCC socket compatible)
Terminal Form J BEND —
MSL 等级 [DATA_NEEDED: MSL moisture sensitivity level] —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] —
Family — MAX 9000
Architecture — MAX (Multiple Array MatriX), 3rd generation
Process Technology — CMOS EEPROM
Logic Array Blocks (LABs) — 20
User I/O Pins — 56
Pin-to-Pin Delay — 10 ns
Maximum Counter Frequency — 144.9 MHz
VCCINT (Core Supply) — 5.0 V
VCCIO (I/O Supply) — 3.3 V or 5.0 V
Input Logic Levels — TTL-compatible (at 5.0 V VCCINT)
In-System Programmability — Yes (IEEE Std. 1149.1 JTAG)
封装 — 84-pin PLCC (J-lead, 1.270 mm pitch)
Configuration Memory — EEPROM, non-volatile

数据手册与资源

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