IR2101STRPBF vs IR2181SPBF Comparación
Comparación detallada lado a lado de IR2101STRPBF por Infineon y IR2181SPBF por Infineon. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | IR2101STRPBF | IR2181SPBF |
|---|---|---|
| Marca | Infineon | Infineon |
| Categoría | Power MOSFET Drivers | Power MOSFET Drivers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,68 | $0,72 |
| Configuration | Half-Bridge (High-Side and Low-Side), Independent | — |
| Number of Drivers | 2 | — |
| Driver Type | Non-Inverting | — |
| Maximum Offset Voltage | 600 V | — |
| Gate Drive Supply Voltage (VCC) | 10 V to 20 V | — |
| Source Current (Typ.) | 210 mA | — |
| Sink Current (Typ.) | 360 mA | — |
| Propagation Delay (Typ.) | 160 ns | — |
| Rise Time (Typ.) | [DATA_NEEDED: rise time] | — |
| Fall Time (Typ.) | [DATA_NEEDED: fall time] | — |
| Logic Input Compatibility | 3.3 V / 5 V / 15 V CMOS/LSTTL | 3.3 V, 5 V, and 15 V logic |
| Bootstrap Diode | Integrated | — |
| Undervoltage Lockout (UVLO) | Yes (VCC and VBS) | — |
| Negative Transient Immunity on VS | Yes (dV/dt immune) | — |
| Encapsulado | 8-SOIC (0.154 inch, 3.90 mm Width) | 8-pin SOIC (SO-8) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | -40 C to +125 C | -40C to +125C |
| Nivel MSL | MSL 3 | 1 (unlimited) |
| Estado RoHS | Compliant | Compliant |
| Driver Configuration | — | Half-Bridge (High Side + Low Side) |
| Número de salidas | — | 2 (independent high-side and low-side) |
| High-Side Offset Voltage | — | Up to +600 V |
| Gate Drive Supply (VCC, VB-VS) | — | 10 V to 20 V |
| Logic Supply (VDD/VSS) | — | 3.3 V to 20 V (logic-level compatible) |
| Source/Sink Drive Current | — | 1.9 A source / 2.3 A sink (typical) |
| Propagation Delay (typ.) | — | 140 ns (typical) |
| UVLO | — | Yes (both channels) |
| dV/dt Immunity | — | Yes (latch-immune CMOS) |
| Negative Transient on VS | — | Tolerant |