EP610DC-10 vs EP610DC-35 مقایسه
مقایسه دقیق کنار به کنار EP610DC-10 توسط Intel و EP610DC-35 توسط Altera. مشخصات کلیدی، پارامترهای الکتریکی، بستهبندی، وضعیت چرخه عمر، قیمتگذاری و موجودی را مقایسه کنید تا بهترین قطعه را برای نیازهای طراحی خود تعیین کنید.
مقایسه مشخصات
| پارامتر | EP610DC-10 | EP610DC-35 |
|---|---|---|
| برند | Intel | Altera |
| دستهبندی | FPGA & CPLD | FPGA & CPLD |
| وضعیت چرخه عمر | Obsolete | NRND |
| Device Family | Altera Classic EPLD | — |
| Macrocells | 16 | 16 |
| Maximum Pipelined Data Rate | 100 MHz | — |
| Pin-to-Pin Propagation Delay (tpd) | 10 ns | — |
| Speed Grade | -10 | — |
| بستهبندی | 24-pin CDIP (Ceramic DIP, windowed) | 24-pin CDIP (windowed CERDIP) 0.300 inch |
| نوع نصب | Through-Hole | Through-Hole (DIP) |
| Technology | CMOS, EPROM-based (UV-erasable) | — |
| ولتاژ تغذیه | 5 V (single supply) | — |
| دمای کاری | 0C to +70C (commercial) | 0C to +70C (commercial) [DATA_NEEDED: explicit range from datasheet] |
| I/O Pins | [DATA_NEEDED: exact I/O count for CDIP-24 variant] | — |
| Logic Elements | 16 macrocells (programmable AND/OR array) | — |
| Configuration Memory | UV-erasable EPROM | — |
| Reprogrammable | Yes (UV erase window on package) | — |
| وضعیت RoHS | [DATA_NEEDED: not stated in verified web data] | [DATA_NEEDED: not explicitly confirmed in retrieved data; CERDIP packages typically non-RoHS] |
| Device Type | — | CPLD - Classic EPLD |
| Family | — | Altera Classic EP610 |
| Usable Gates | — | 300 |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Pipelined Data Rate | — | up to 100 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Process Technology | — | CMOS |
| Program/erase Method | — | UV-erasable (windowed CERDIP) |
| Manufacturer | — | Originally Altera; today supplied via Rochester Electronics (authorized) |