6EDL04N02PRXUMA1 vs 6EDL04N03PRXUMA1 Comparaison
Comparaison détaillée côte à côte de 6EDL04N02PRXUMA1 par Infineon et 6EDL04N03PRXUMA1 par Infineon. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 6EDL04N02PRXUMA1 | 6EDL04N03PRXUMA1 |
|---|---|---|
| Marque | Infineon | Infineon |
| Catégorie | Power MOSFET Drivers | Power MOSFET Drivers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $2,32 | $1,85 |
| Product Type | 3-Phase Gate Driver IC | — |
| Driver Configuration | Half-bridge (3 high-side + 3 low-side) | — |
| Maximum Blocking Voltage | +180 V (VS referenced to GND for high side) | — |
| Rated Supply Voltage (VCC) | 200 V class (operating range 10 V to 20 V on VCC) | — |
| Source Current (typ.) | 0.375 A | — |
| Sink Current (typ.) | 0.75 A | — |
| Bootstrap Diode | Integrated (BSD) on all 3 high-side drivers | Integrated (3 channels) |
| Over-Current Protection | Yes (single-shunt, ITRIP/CIN pin) | Yes (adjustable threshold via ITRIP) |
| Enable Pin (EN) | Yes (active-high) | — |
| Fault Output (nFAULT) | Yes (active-low, open-drain) | — |
| Input Logic Compatibility | CMOS / LSTTL, 3.3 V and 5 V | — |
| Interlocking / Anti-shoot-through | Yes (built-in per phase pair) | — |
| Process Technology | Thin-film SOI (Silicon-On-Insulator) | — |
| Plage de température de fonctionnement | -40 °C to +125 °C | — |
| Maximum Junction Temperature | +150 °C | — |
| Boîtier | PG-TSSOP-28 (28-pin, 4.40 mm width, exposed pad) | PG-TSSOP-25 |
| Type de montage | Surface Mount | Surface Mount |
| Target Switches | MOSFETs up to 180 V, IGBTs up to 180 V | — |
| Niveau MSL | MSL3 (per JEDEC J-STD-020, [DATA_NEEDED: confirm level]) | 3 |
| Statut RoHS | Compliant | Compliant |
| Driver Type | — | Three-phase gate driver (6-channel half-bridge) |
| Number of Drivers | — | 6 |
| Configuration de sortie | — | Non-inverting half-bridge |
| Supply Voltage (VDD) | — | 10 V to 25 V |
| Logic Supply Voltage (VSS) | — | 3.3 V / 5 V |
| Output Current (Source) | — | 0.24 A |
| Output Current (Sink) | — | 0.375 A |
| Temps de montée | — | 60 ns (typical at 1 nF load) |
| Temps de descente | — | 26 ns (typical at 1 nF load) |
| Fault Output | — | Yes (open-drain) |
| Broche d'activation | — | Yes (EN, active-high) |
| Propagation Delay | — | [DATA_NEEDED: propagation delay] |
| Température de fonctionnement | — | -40 C to +125 C |
| Blocking Voltage | — | 200 V / 600 V family |