EP20K400FC672-3 vs EP20K400FI672-2N Comparaison
Comparaison détaillée côte à côte de EP20K400FC672-3 par Altera et EP20K400FI672-2N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400FC672-3 | EP20K400FI672-2N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $138,00 | $188,75 |
| Family | APEX 20K | APEX 20K |
| Device Logic Elements | 16,640 cells | — |
| Typical Gate Count | 400,000 system gates | — |
| Maximum User I/Os | 502 | — |
| Propagation Delay | 2.5 ns | 3.1 ns |
| Internal Performance | 167 MHz | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | — |
| Logic Family | CMOS, SRAM-based | — |
| Boîtier | 672-pin FC-FBGA | 672-pin FC-FBGA (Flip-Chip Fine-pitch BGA) |
| Package Code | BGA | — |
| Number of Terminals | 672 | — |
| Terminal Form | Ball (BGA) | — |
| Speed Grade | -3 (commercial fastest) | -2 |
| Température de fonctionnement | 0 °C to 85 °C | Commercial (0 °C to +70 °C) [DATA_NEEDED: industrial variant] |
| Type de montage | Surface Mount | Surface Mount |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Programming Method | SRAM, JTAG (ByteBlaster) | — |
| Statut du cycle de vie | Obsolete / Legacy | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Compliant (lead-free) |
| Typical Gates | — | 400,000 |
| Logic Elements / Cells | — | 16,640 |
| Maximum User I/O | — | 488 |
| Embedded Memory Bits | — | 212,992 bits |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count per family datasheet] |
| Core Voltage | — | 2.5 V |
| Maximum Frequency | — | 200 MHz |
| Package Body Size | — | 27 x 27 mm |
| Terminal Pitch | — | 1.0 mm |
| Niveau de sensibilité à l'humidité (MSL) | — | 3 |
| Peak Reflow Temperature | — | 220 °C |
| Configuration Modes | — | PS, PPS, PPA, JTAG |
| Supported I/O Standards | — | LVTTL, LVCMOS, SSTL, HSTL |