EP20K60EFC144-2XN vs EP20K60EFI144-2X Comparaison
Comparaison détaillée côte à côte de EP20K60EFC144-2XN par Altera et EP20K60EFI144-2X par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K60EFC144-2XN - APEX-20KE FPGA 60K Gates 93 I/O 144-BGA | Intel/Altera
EP20K60EFC144-2XN NrndComparaison des spécifications
| Paramètre | EP20K60EFC144-2XN | EP20K60EFI144-2X |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $152,00 | $65,00 |
| Series | APEX-20KE | — |
| Family | APEX-20K (MultiCore Architecture) | — |
| Typical Gate Count | 60,000 gates | — |
| Logic Elements / Embedded Array Blocks | 2,560 | — |
| Embedded Memory (Bits) | 32,768 | — |
| Maximum User I/O | 93 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | 1.8 V (range 1.71 V to 1.89 V) |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Package Type | 144-BGA (Fine-pitch Ball Grid Array) | FBGA-144 (FineLine BGA, LBGA) |
| Package Code (per MPN suffix) | FBGA / LBGA, 13x13 mm | — |
| Type de montage | Surface Mount | Surface Mount |
| Operating Temperature (TJ) | 0 C to +85 C (commercial) | — |
| Speed Grade | -2 (per MPN suffix) | -2 (industrial, -2X suffix) |
| Configuration Method | JTAG (IEEE 1149.1), Passive Serial, Parallel | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Logic Family | CMOS, SRAM-based LUT | — |
| Device Family | — | APEX 20KE |
| Typical Gates | — | 60,000 |
| Logic Elements | — | 2,560 |
| Maximum Operating Frequency | — | 200 MHz |
| Process Technology | — | 0.22 µm CMOS |
| Propagation Delay (tpd) | — | 2.41 ns |
| User I/O Pins | — | 93 |
| Dedicated Inputs | — | 4 |
| Total Terminals | — | 144 |
| Package Code | — | LBGA |
| Terminal Form | — | Ball |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |
| I/O Standard Support | — | LVDS, 1.8 V I/O |
| Température de fonctionnement | — | -40 °C to +85 °C |
| Configuration Interface | — | JTAG (IEEE 1149.1) / serial PROM / parallel PROM |
| Niveau de sensibilité à l'humidité (MSL) | — | 3 |