EP2A40F672C6 vs EP2A40F672C6N Comparaison
Comparaison détaillée côte à côte de EP2A40F672C6 par Altera et EP2A40F672C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40F672C6 | EP2A40F672C6N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $105,00 | $165,00 |
| Family | APEX II | APEX II |
| Device | EP2A40 | — |
| Logic Elements (typical) | 40,000 | — |
| Maximum System Gates | [DATA_NEEDED: maximum system gates] | 1,125,000 |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | 160 |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O count] | [DATA_NEEDED: maximum user I/O count] |
| Boîtier | 672-ball FineLine BGA (FBGA-672) | 672-ball FineLine BGA |
| Speed Grade | C6 (commercial) | C6 (per part number suffix) |
| Température de fonctionnement | Commercial (0C to +85C) | Commercial (0C to +85C) |
| Process Technology | 0.18-micron CMOS | SRAM-based, 0.18 um (per family datasheet) |
| Configuration Memory | SRAM-based | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| PLL Support | Yes | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Lifecycle | Obsolete / EOL (per Intel/Altera product discontinuation notice) | — |
| Logic Elements | — | 40,000 |
| Embedded RAM Bits | — | 442,368 |
| Core Voltage | — | 1.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V |
| Configuration Methods | — | Passive Serial, Passive Parallel, JTAG |
| PLL Count | — | [DATA_NEEDED: PLL count] |