EP2A40F672C6 vs EP2A40F672C8N Comparaison
Comparaison détaillée côte à côte de EP2A40F672C6 par Altera et EP2A40F672C8N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40F672C6 | EP2A40F672C8N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $105,00 | $122,00 |
| Family | APEX II | APEX II |
| Device | EP2A40 | — |
| Logic Elements (typical) | 40,000 | — |
| Maximum System Gates | [DATA_NEEDED: maximum system gates] | — |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O count] | — |
| Boîtier | 672-ball FineLine BGA (FBGA-672) | — |
| Speed Grade | C6 (commercial) | C8 |
| Température de fonctionnement | Commercial (0C to +85C) | — |
| Process Technology | 0.18-micron CMOS | — |
| Configuration Memory | SRAM-based | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| PLL Support | Yes | — |
| Type de montage | Surface Mount (BGA) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Lifecycle | Obsolete / EOL (per Intel/Altera product discontinuation notice) | — |
| Series | — | EP2A40 |
| Logic Family | — | CMOS |
| System Gates | — | 1.5 M |
| Logic Elements / Cells | — | 38,400 |
| Maximum Operating Frequency | — | 376 MHz |
| Propagation Delay | — | 1.55 ns |
| Technology Node | — | 0.15 µm |
| Process Feature | — | All-layer copper, up to 8 metal layers |
| Nominal Supply Voltage (VCCINT) | — | 1.5 V |
| Supply Voltage Range | — | 1.425 V to 1.575 V |
| User I/Os | — | 492 |
| Number of Pins / Balls | — | 672 |
| Package Type | — | FC-FBGA (FineLine BGA) |
| Package Dimensions | — | 27 x 27 mm |
| Ball Pitch | — | 1.0 mm |
| LVDS Data Rate | — | 1 Gbps |
| Embedded PLLs | — | 4 |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| Operating Temperature (Commercial) | — | 0 °C to 85 °C |