EP3SE50F780I4 vs EP3SE50F780C4N Comparaison
Comparaison détaillée côte à côte de EP3SE50F780I4 par Altera et EP3SE50F780C4N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP3SE50F780I4 - Stratix III E FPGA, 47.5K LE, 780-FBGA | Intel / Altera
EP3SE50F780I4 ⚠ Dernier achat
Comparaison des spécifications
| Paramètre | EP3SE50F780I4 | EP3SE50F780C4N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 195,00 | $1 430,00 |
| Family | Stratix III E (Enhanced) | Stratix III E |
| Series | Stratix III | — |
| Logic Elements (LE) | 47,500 | 47,500 |
| Adaptive Logic Modules (ALMs) | 1,900 LABs | — |
| Total Memory | 5,760 Kbits | — |
| Embedded Memory Blocks | [DATA_NEEDED: block count and sizes] | — |
| Embedded Multipliers / DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Maximum User I/Os | 488 | 488 |
| User I/O Banks | [DATA_NEEDED: bank count] | — |
| Transceivers | [DATA_NEEDED: transceiver count and data rate] | — |
| Process Technology | 65 nm CMOS | — |
| Core Voltage | 1.1 V | — |
| Operating Temperature Grade | I4 (Industrial) | — |
| Boîtier | 780-ball FC-FBGA | 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Statut RoHS | [DATA_NEEDED] | Lead-free / RoHS compliant |
| Lead-Free | Yes (per Altera/Intel product page) | — |
| Embedded Memory Bits | — | 5,760,000 |
| Embedded Memory (M9K/M144K blocks) | — | 488 (per family datasheet) |
| Number of LABs | — | 1900 |
| DSP Blocks (18x18 multipliers) | — | 432 |
| PLLs | — | 12 (per family datasheet) |
| Maximum Operating Frequency | — | 717 MHz |
| Transceiver Channels | — | Up to 12 (per family, model-dependent) |
| Transceiver Data Rate | — | Up to 6.375 Gbps (per Stratix III E family) |
| Process Node | — | 40 nm |
| Tension d'alimentation | — | Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail) |
| Température de fonctionnement | — | 0C to +85C (C4 commercial grade) |
| Configuration Modes | — | JTAG, Passive Serial, Fast Passive Parallel |
| Niveau MSL | — | 3 (per JEDEC J-STD-020, FBGA package) |
| Hard Memory Controller | — | DDR2/DDR3 SDRAM (per Stratix III E family) |