EP3SE50F780I4 vs EP3SE50F780C4N 对比

详细并排对比 EP3SE50F780I4 出自 Altera 和 EP3SE50F780C4N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SE50F780I4 EP3SE50F780C4N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 不推荐新设计
库存状态 有库存 有库存
单价(USD) $1,195.00 $1,430.00
Family Stratix III E (Enhanced) Stratix III E
Series Stratix III —
Logic Elements (LE) 47,500 47,500
Adaptive Logic Modules (ALMs) 1,900 LABs —
Total Memory 5,760 Kbits —
Embedded Memory Blocks [DATA_NEEDED: block count and sizes] —
Embedded Multipliers / DSP Blocks [DATA_NEEDED: DSP block count] —
Maximum User I/Os 488 488
User I/O Banks [DATA_NEEDED: bank count] —
Transceivers [DATA_NEEDED: transceiver count and data rate] —
Process Technology 65 nm CMOS —
Core Voltage 1.1 V —
Operating Temperature Grade I4 (Industrial) —
封装 780-ball FC-FBGA 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch
安装类型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 状态 [DATA_NEEDED] Lead-free / RoHS compliant
Lead-Free Yes (per Altera/Intel product page) —
Embedded Memory Bits — 5,760,000
Embedded Memory (M9K/M144K blocks) — 488 (per family datasheet)
Number of LABs — 1900
DSP Blocks (18x18 multipliers) — 432
PLLs — 12 (per family datasheet)
Maximum Operating Frequency — 717 MHz
Transceiver Channels — Up to 12 (per family, model-dependent)
Transceiver Data Rate — Up to 6.375 Gbps (per Stratix III E family)
Process Node — 40 nm
电源电压 — Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail)
工作温度 — 0C to +85C (C4 commercial grade)
Configuration Modes — JTAG, Passive Serial, Fast Passive Parallel
MSL 等级 — 3 (per JEDEC J-STD-020, FBGA package)
Hard Memory Controller — DDR2/DDR3 SDRAM (per Stratix III E family)

数据手册与资源

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