EP3SL200F1517I4LN vs EP3SE260F1517I4LN Comparaison
Comparaison détaillée côte à côte de EP3SL200F1517I4LN par Intel et EP3SE260F1517I4LN par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP3SE260F1517I4LN - 260K LE Stratix III E FPGA, 1517-FCBGA | Intel
EP3SE260F1517I4LN ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP3SL200F1517I4LN | EP3SE260F1517I4LN |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $6 300,00 | $2 895,00 |
| Family | Stratix III L | Stratix III E (Enhanced) |
| Logic Elements | 200,000 | 255,000 |
| Embedded Memory Bits | 10,901,504 | 16,672,768 bits (~2,044 KBytes) |
| Logic Array Blocks (LABs) | 8,000 | 10,200 |
| User I/O Pins | 976 | — |
| Boîtier | 1517-BBGA, FCBGA | 1517-ball FCBGA (40 mm x 40 mm, 1.0 mm pitch) |
| Process Technology | 65 nm TSMC low-power | 40 nm CMOS |
| Température de fonctionnement | -40C to +100C (Industrial) | -40C to +100C (case, industrial) |
| Type de montage | Surface Mount (BGA) | — |
| Statut RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Niveau MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Supply Voltage Core | [DATA_NEEDED: VCC core voltage] | — |
| Transceiver Data Rate (max) | [DATA_NEEDED: max transceiver rate] | — |
| DSP Blocks (18x18 multipliers) | 384 | Up to 384 (family-level, device-specific count not in provided data) |
| DSP Performance | 288 GMACS | — |
| Configuration Method | Passive Parallel / Active Serial / JTAG | — |
| Ball Pitch | 1.0 mm | — |
| Package Dimensions | 40 mm x 40 mm | — |
| User I/O Count | — | 976 |
| Speed Grade | — | I4 (industrial, 4th tier) |
| Power Option | — | L (low-power) |
| Lead-Free / RoHS | — | Yes (N suffix) |
| Transceivers | — | Stratix III E family supports up to 24 transceivers up to 8.5 Gbps |
| Partial Reconfiguration | — | Supported |
| Memory Interface Support | — | DDR3, DDR2, QDR II+ (hardened PHY) |
| Configuration Scheme | — | Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP), JTAG |