EP910LC-32 vs EP910LC-30Y Comparaison
Comparaison détaillée côte à côte de EP910LC-32 par Altera et EP910LC-30Y par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910LC-32 | EP910LC-30Y |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,85 | $25,40 |
| Device Family | Altera Classic EPLD | — |
| Number of Macrocells | 24 | — |
| Number of Usable Gates | 900 gates (typical) | — |
| Number of Dedicated Inputs | 10 | — |
| Number of I/O Pins | 20 | — |
| Boîtier | PLCC-32 | PLCC-44 |
| Speed Grade | -32 | — |
| Maximum Toggle Frequency (fMAX) | [DATA_NEEDED: fMAX value in MHz for -32 grade] | — |
| Pin-to-Pin Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns for -32 grade] | — |
| Supply Voltage (VCC) | 5 V | — |
| Logic Family | Low-power CMOS (LC suffix) | — |
| Programming Method | UV-erasable or one-time programmable (OTP for LC windowless variant) | — |
| Plage de température de fonctionnement | [DATA_NEEDED: commercial or industrial grade] | — |
| I/O Standard | TTL-compatible | — |
| Type de montage | Surface Mount (PLCC socket or direct solder) | Surface Mount (PLCC socket) |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS status not specified in retrieved data] |
| Niveau MSL | unknown | — |
| Family | — | Altera Classic EPLD |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Pin-to-Pin Delay (tPD) | — | 30 ns |
| Counter Frequency (fMAX) | — | 100 MHz (family maximum) |
| Tension d'alimentation | — | 5 V (TTL-compatible) |
| Process Technology | — | CMOS, UV-erasable / OTP |
| Température de fonctionnement | — | Commercial 0C to +70C |
| Speed/Power Grade | — | LC (low-power, 30ns) |
| Processing Flow | — | Y (extended reliability) |
| Logic Compatibility | — | 100% TTL emulation |