EP910LC-32 vs EP910LC-40 Comparaison
Comparaison détaillée côte à côte de EP910LC-32 par Altera et EP910LC-40 par Rochester Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 ObsoleteComparaison des spécifications
| Paramètre | EP910LC-32 | EP910LC-40 |
|---|---|---|
| Marque | Altera | Rochester Electronics |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,85 | $52,00 |
| Device Family | Altera Classic EPLD | Altera Classic EPLD - EP910 |
| Number of Macrocells | 24 | — |
| Number of Usable Gates | 900 gates (typical) | — |
| Number of Dedicated Inputs | 10 | — |
| Number of I/O Pins | 20 | — |
| Boîtier | PLCC-32 | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) |
| Speed Grade | -32 | — |
| Maximum Toggle Frequency (fMAX) | [DATA_NEEDED: fMAX value in MHz for -32 grade] | 25 MHz |
| Pin-to-Pin Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns for -32 grade] | — |
| Supply Voltage (VCC) | 5 V | 5 V (single supply) |
| Logic Family | Low-power CMOS (LC suffix) | — |
| Programming Method | UV-erasable or one-time programmable (OTP for LC windowless variant) | Altera Logic Programmer (PLAD-J), 4-wire serial |
| Plage de température de fonctionnement | [DATA_NEEDED: commercial or industrial grade] | — |
| I/O Standard | TTL-compatible | — |
| Type de montage | Surface Mount (PLCC socket or direct solder) | — |
| Statut RoHS | unknown | Not applicable (legacy) |
| Niveau MSL | unknown | — |
| Manufacturer | — | Rochester Electronics (Altera original) |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Macrocells | — | 24 |
| Logic Array Blocks | — | 2 (12 macrocells each) |
| Propagation Delay (tPD) | — | 40 ns |
| User I/O Pins | — | 36 |
| Dedicated Inputs | — | 4 |
| Technology | — | CMOS EPROM |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| Lead-Free Status | — | Not applicable |