EP910LC-32 vs EP910LC-40 对比

详细并排对比 EP910LC-32 出自 Altera 和 EP910LC-40 出自 Rochester Electronics。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910LC-32 EP910LC-40
品牌 Altera Rochester Electronics
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.85 $52.00
Device Family Altera Classic EPLD Altera Classic EPLD - EP910
Number of Macrocells 24 —
Number of Usable Gates 900 gates (typical) —
Number of Dedicated Inputs 10 —
Number of I/O Pins 20 —
封装 PLCC-32 PQCC-44 (Plastic Leaded Chip Carrier, J-lead)
Speed Grade -32 —
Maximum Toggle Frequency (fMAX) [DATA_NEEDED: fMAX value in MHz for -32 grade] 25 MHz
Pin-to-Pin Propagation Delay (tPD) [DATA_NEEDED: tPD in ns for -32 grade] —
Supply Voltage (VCC) 5 V 5 V (single supply)
Logic Family Low-power CMOS (LC suffix) —
Programming Method UV-erasable or one-time programmable (OTP for LC windowless variant) Altera Logic Programmer (PLAD-J), 4-wire serial
工作温度范围 [DATA_NEEDED: commercial or industrial grade] —
I/O Standard TTL-compatible —
安装类型 Surface Mount (PLCC socket or direct solder) —
RoHS 状态 unknown Not applicable (legacy)
MSL 等级 unknown —
Manufacturer — Rochester Electronics (Altera original)
Product Type — EPLD (Erasable Programmable Logic Device)
Usable Gates — 450
Macrocells — 24
Logic Array Blocks — 2 (12 macrocells each)
Propagation Delay (tPD) — 40 ns
User I/O Pins — 36
Dedicated Inputs — 4
Technology — CMOS EPROM
Operating Temperature (Commercial) — 0 C to +70 C
Lead-Free Status — Not applicable

数据手册与资源

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