EPC2LC02N vs EPC2L20N Comparaison
Comparaison détaillée côte à côte de EPC2LC02N par Intel et EPC2L20N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC2LC02N | EPC2L20N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | Memory ICs |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3,40 | $17,20 |
| Device Type | Enhanced Configuration Device (Configuration PROM) | — |
| Memory Density | 1.6 Mbit | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | — |
| Interface | Serial or Parallel FPGA configuration, JTAG (IEEE 1149.1) ISP | — |
| Programmability | In-System Programmable (ISP) via JTAG | — |
| Supported FPGA Families | APEX II, APEX 20K, ACEX 1K, FLEX 10K, Mercury, Stratix (partial) | Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet) |
| Configuration Mode | Serial / Parallel / Multi-device daisy-chain | — |
| Température de fonctionnement | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Boîtier | 20-pin PLCC (Plastic Leaded Chip Carrier) | — |
| Package Code | L (PLCC-20, leaded) | — |
| Type de montage | Surface Mount / Socket | Surface Mount (J-Lead PLCC) |
| JTAG Compliance | IEEE 1149.1 (TAP controller with 4-wire interface) | — |
| DC Input Voltage (absolute max) | -0.3 V to +7.0 V (transients to -2.0 V / +7.0 V for <20 ns) | — |
| Lead-Free / RoHS | Lead finish version dependent (Pb-free and SnPb variants exist) | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | 3 (168 hours) |
| Programming Cycles | 100 typical (flash endurance, per datasheet) | — |
| Fonction | — | In-System Programmable Configuration PROM for SRAM-based LUT FPGAs |
| Taille de mémoire | — | 1.6 Mbit |
| Programmable Type | — | In System Programmable (ISP) |
| Supply Voltage - VCCINT/VCCIO | — | 3.0 V to 3.6 V or 4.5 V to 5.5 V |
| Boîtier / Format | — | 20-LCC (J-Lead), PLCC-20 |
| Packaging | — | Tube |
| Configuration Interface | — | Serial (Altera FPP / PS configuration scheme) |
| Cascade Support | — | Yes (multi-PROM chain via CE control) |
| Programming Method | — | In-system via 4-wire ISP / JTAG-style |
| Nombre de broches | — | 20 |
| Lead Finish | — | Matte Tin (Pb-free) |
| Statut RoHS | — | Compliant |