EPC2LC02N vs EPC2L20N 对比

详细并排对比 EPC2LC02N 出自 Intel 和 EPC2L20N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2LC02N EPC2L20N
品牌 Intel Altera
分类 FPGA & CPLD Memory ICs
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $3.40 $17.20
Device Type Enhanced Configuration Device (Configuration PROM) —
Memory Density 1.6 Mbit —
Supply Voltage (VCC) 3.0 V to 3.6 V —
接口 Serial or Parallel FPGA configuration, JTAG (IEEE 1149.1) ISP —
Programmability In-System Programmable (ISP) via JTAG —
Supported FPGA Families APEX II, APEX 20K, ACEX 1K, FLEX 10K, Mercury, Stratix (partial) Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet)
Configuration Mode Serial / Parallel / Multi-device daisy-chain —
工作温度 -40C to +85C (industrial) 0C to +70C (commercial)
封装 20-pin PLCC (Plastic Leaded Chip Carrier) —
Package Code L (PLCC-20, leaded) —
安装类型 Surface Mount / Socket Surface Mount (J-Lead PLCC)
JTAG Compliance IEEE 1149.1 (TAP controller with 4-wire interface) —
DC Input Voltage (absolute max) -0.3 V to +7.0 V (transients to -2.0 V / +7.0 V for <20 ns) —
Lead-Free / RoHS Lead finish version dependent (Pb-free and SnPb variants exist) —
MSL 等级 [DATA_NEEDED: MSL level] 3 (168 hours)
Programming Cycles 100 typical (flash endurance, per datasheet) —
功能 — In-System Programmable Configuration PROM for SRAM-based LUT FPGAs
存储容量 — 1.6 Mbit
Programmable Type — In System Programmable (ISP)
Supply Voltage - VCCINT/VCCIO — 3.0 V to 3.6 V or 4.5 V to 5.5 V
封装 / 外壳 — 20-LCC (J-Lead), PLCC-20
Packaging — Tube
Configuration Interface — Serial (Altera FPP / PS configuration scheme)
Cascade Support — Yes (multi-PROM chain via CE control)
Programming Method — In-system via 4-wire ISP / JTAG-style
引脚数量 — 20
Lead Finish — Matte Tin (Pb-free)
RoHS 状态 — Compliant

数据手册与资源

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