EPC448PC-20 vs EPC2LI20 Comparaison
Comparaison détaillée côte à côte de EPC448PC-20 par Altera et EPC2LI20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPC448PC-20 | EPC2LI20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,25 | $5,95 |
| Device Family | Enhanced Configuration Device (EPC) | — |
| Memory Density | 4 Mbit (4,194,304 bits) | — |
| Speed Grade | -20 | — |
| Supply Voltage (VCC) | 3.3 V | — |
| Configuration Clock (Max) | 20 MHz | — |
| Interface to FPGA | Dedicated Altera/Intel configuration serial (Active Serial) | — |
| Programming Interface | JTAG (IEEE 1149.1) ISP | — |
| Boîtier | 20-ball PC-BGA | — |
| Type de montage | Surface Mount | Surface Mount (PLCC socket-compatible) |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (Industrial) |
| Configuration Time (typical 4 Mbit) | Approx. 200 ms at 20 MHz | — |
| Supported FPGA Series | APEX 20K, ACEX 1K, Cyclone, Cyclone II/III, Stratix/Stratix II | — |
| Compression | Supported (1.5x to 2x depending on bitstream) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Taille de mémoire | — | 1.6 Mb (1,572,864 bits) |
| Type de mémoire | — | Flash (in-system programmable) |
| Programmable Type | — | In System Programmable (ISP) |
| Fonction | — | Configuration PROM for SRAM-based FPGAs |
| Supply Voltage - Operating | — | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) |
| Boîtier / Format | — | 20-PLCC (J-lead, 9x9 mm) |
| Configuration Interface | — | Serial or Byte-wide (parallel) |
| Decompression | — | On-chip (supports compressed bitstreams) |
| JTAG / ISP Interface | — | IEEE 1532 (TCK, TMS, TDI, TDO) |
| Multi-Device Support | — | Yes (daisy-chain configuration) |
| User-Accessible Memory | — | Yes (unused flash available to user logic) |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |