EPC448PC-20 vs EPC2LI20 比較

詳細並排比較 EPC448PC-20 由 Altera 與 EPC2LI20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC448PC-20 EPC2LI20
品牌 Altera Altera
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete NRND
Device Family Enhanced Configuration Device (EPC) —
Memory Density 4 Mbit (4,194,304 bits) —
Speed Grade -20 —
Supply Voltage (VCC) 3.3 V —
Configuration Clock (Max) 20 MHz —
Interface to FPGA Dedicated Altera/Intel configuration serial (Active Serial) —
Programming Interface JTAG (IEEE 1149.1) ISP —
封裝 20-ball PC-BGA —
安裝類型 Surface Mount Surface Mount (PLCC socket-compatible)
工作溫度 [DATA_NEEDED: operating temperature range] -40 C to +85 C (Industrial)
Configuration Time (typical 4 Mbit) Approx. 200 ms at 20 MHz —
Supported FPGA Series APEX 20K, ACEX 1K, Cyclone, Cyclone II/III, Stratix/Stratix II —
Compression Supported (1.5x to 2x depending on bitstream) —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] —
記憶體容量 — 1.6 Mb (1,572,864 bits)
記憶體類型 — Flash (in-system programmable)
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
封裝 / 外殼 — 20-PLCC (J-lead, 9x9 mm)
Configuration Interface — Serial or Byte-wide (parallel)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)
MSL 等級 — [DATA_NEEDED: MSL level]

資料表與資源

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