EPM5128JC-1 vs EPM5128JC Comparaison
Comparaison détaillée côte à côte de EPM5128JC-1 par Altera et EPM5128JC par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5128JC-1 | EPM5128JC |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $24,95 | $9,75 |
| Family | MAX 5000 | — |
| Device Type | Erasable Programmable Logic Device (EPLD/CPLD) | EPLD / CPLD |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Maximum Operating Frequency | 62.5 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 40 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (typical) |
| Technology | CMOS, UV-erasable EPROM | — |
| Boîtier | 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier) | — |
| Type de montage | Surface Mount | Surface Mount (PLCC socket or solder) |
| Température de fonctionnement | [DATA_NEEDED: temperature grade] | Commercial 0C to +70C |
| Programming Interface | JTAG / Altera dedicated programmer | Altera MAX+PLUS II / A+PLUS / legacy programmer |
| Configuration Memory | Non-volatile EPROM (UV-erasable) | UV-erasable EPROM (windowed package) |
| Statut RoHS | non_compliant (ceramic windowed package) | [DATA_NEEDED: RoHS status - legacy part] |
| Statut du cycle de vie | Obsolete - last-time-buy inventory only | — |
| Product Family | — | MAX 5000 |
| Macrocell Count | — | 128 |
| Propagation Delay (tPD) | — | 35 ns |
| Logic Elements | — | Programmable AND/OR/XOR array |
| Nombre de broches | — | 68 |
| Package Type | — | PLCC-68 (JLCC) ceramic, J-leaded |
| Dedicated Inputs | — | 8 |
| User I/O Pins | — | [DATA_NEEDED: user I/O pin count] |
| Boundary Scan | — | JTAG IEEE 1149.1 (family feature) |
| Process Technology | — | CMOS EPROM |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |