EPM5128JC-1 vs EPM5128JC Comparison

Detailed side-by-side comparison of EPM5128JC-1 by Altera and EPM5128JC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5128JC-1 EPM5128JC
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $24.95 $9.75
Family MAX 5000 β€”
Device Type Erasable Programmable Logic Device (EPLD/CPLD) EPLD / CPLD
Macrocells 128 β€”
Usable Gates 2,500 β€”
Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] β€”
Maximum Operating Frequency 62.5 MHz β€”
Pin-to-Pin Propagation Delay (tPD) 40 ns β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 5 V (typical)
Technology CMOS, UV-erasable EPROM β€”
Package 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier) β€”
Mounting Type Surface Mount Surface Mount (PLCC socket or solder)
Operating Temperature [DATA_NEEDED: temperature grade] Commercial 0C to +70C
Programming Interface JTAG / Altera dedicated programmer Altera MAX+PLUS II / A+PLUS / legacy programmer
Configuration Memory Non-volatile EPROM (UV-erasable) UV-erasable EPROM (windowed package)
RoHS Status non_compliant (ceramic windowed package) [DATA_NEEDED: RoHS status - legacy part]
Lifecycle Status Obsolete - last-time-buy inventory only β€”
Product Family β€” MAX 5000
Macrocell Count β€” 128
Propagation Delay (tPD) β€” 35 ns
Logic Elements β€” Programmable AND/OR/XOR array
Number of Pins β€” 68
Package Type β€” PLCC-68 (JLCC) ceramic, J-leaded
Dedicated Inputs β€” 8
User I/O Pins β€” [DATA_NEEDED: user I/O pin count]
Boundary Scan β€” JTAG IEEE 1149.1 (family feature)
Process Technology β€” CMOS EPROM
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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