EPM9320RI208-20 vs EPM9320RC208-15 Comparaison
Comparaison détaillée côte à côte de EPM9320RI208-20 par Intel et EPM9320RC208-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM9320RI208-20 | EPM9320RC208-15 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,95 | $0,00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 320 | — |
| Usable Gates | 6,000 | 6,000 |
| Propagation Delay (tPD) | 20 ns | — |
| Maximum Operating Frequency | 100 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Logic Elements / LABs | 20 Logic Array Blocks (16 macro cells each) | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| In-System Programmability | Yes - IEEE 1149.1 JTAG, 5.0-V ISP | Yes (ISP via JTAG) |
| Dedicated Input Pins | 4 (low-skew global) | — |
| User I/O Pins | [DATA_NEEDED: I/O pin count for 208-pin RQFP] | — |
| Boîtier | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power QFP) |
| Operating Temperature Grade | Industrial | — |
| Technology | CMOS EEPROM | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 9000 |
| Macro Cells | — | 320 |
| Pin-to-Pin Propagation Delay | — | 15 ns (speed grade -15) |
| Fréquence d'horloge maximale | — | 117.6 MHz |
| Tension d'alimentation | — | 5.0 V |
| Configuration Technology | — | EEPROM-based (non-volatile) |
| JTAG Interface | — | IEEE Std. 1149.1 |
| Package Type | — | 208-BFQFP Exposed Pad |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Number of I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Logic Array Blocks | — | [DATA_NEEDED: LAB count] |
| Statut du cycle de vie | — | Obsolete (PDN0706, 2007) |