EPM9560RC208-21 vs EPM9560RC208-15 Comparaison
Comparaison détaillée côte à côte de EPM9560RC208-21 par Intel et EPM9560RC208-15 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EPM9560RC208-21 - MAX 9000 CPLD, 560 Macrocells, 208-Pin RQFP | Intel (Altera)
EPM9560RC208-21 ⚠ Dernier achatComparaison des spécifications
| Paramètre | EPM9560RC208-21 | EPM9560RC208-15 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $22,95 | $0,00 |
| Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX), third-generation | Third-generation Multiple Array MatriX (MAX) |
| Technology | CMOS EEPROM-based | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 gates |
| Logic Array Blocks (LABs) | 16 | — |
| Flip-Flops | 772 | — |
| Maximum User I/O | 149 | — |
| Propagation Delay (speed grade -21) | 21 ns (max, per speed grade designation) | — |
| Tension d'alimentation | 5.0 V | 5.0 V |
| I/O Voltage Tolerance | 3.3 V or 5 V (per variant) | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | Yes, via IEEE Std. 1149.1 JTAG |
| Boîtier | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Température de fonctionnement | [DATA_NEEDED: industrial or commercial grade -21 suffix] | [DATA_NEEDED: operating temperature range] |
| Configuration Memory | EEPROM (non-volatile) | — |
| Security Bit | Yes (programmable) | — |
| Statut RoHS | [DATA_NEEDED: confirm RoHS compliance for -21 variant] | [DATA_NEEDED: RoHS status] |
| Device Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 560 macro cells |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Speed | — | 117.6 MHz |
| Configuration Technology | — | EEPROM (non-volatile) |
| Type de montage | — | Surface Mount |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |
| Speed Grade | — | -15 (15 ns pin-to-pin) |