IR2101STRPBF vs IRS2101STRPBF Comparaison
Comparaison détaillée côte à côte de IR2101STRPBF par Infineon et IRS2101STRPBF par Infineon. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | IR2101STRPBF | IRS2101STRPBF |
|---|---|---|
| Marque | Infineon | Infineon |
| Catégorie | Power MOSFET Drivers | Power MOSFET Drivers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,68 | $1,18 |
| Configuration | Half-Bridge (High-Side and Low-Side), Independent | — |
| Number of Drivers | 2 | 2 |
| Driver Type | Non-Inverting | High-Side, Low-Side (Half-Bridge) |
| Maximum Offset Voltage | 600 V | 600 V |
| Gate Drive Supply Voltage (VCC) | 10 V to 20 V | — |
| Source Current (Typ.) | 210 mA | — |
| Sink Current (Typ.) | 360 mA | — |
| Propagation Delay (Typ.) | 160 ns | — |
| Rise Time (Typ.) | [DATA_NEEDED: rise time] | — |
| Fall Time (Typ.) | [DATA_NEEDED: fall time] | — |
| Logic Input Compatibility | 3.3 V / 5 V / 15 V CMOS/LSTTL | 3.3 V / 5 V / 15 V |
| Bootstrap Diode | Integrated | — |
| Undervoltage Lockout (UVLO) | Yes (VCC and VBS) | — |
| Negative Transient Immunity on VS | Yes (dV/dt immune) | — |
| Boîtier | 8-SOIC (0.154 inch, 3.90 mm Width) | 8-SOIC (SOIC-8) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -40 C to +125 C | -40C to +125C |
| Niveau MSL | MSL 3 | — |
| Statut RoHS | Compliant | Compliant (PBF suffix) |
| Nombre de sorties | — | 2-OUT |
| Configuration de sortie | — | Non-Inverting |
| Gate Drive Supply (VCC) | — | 10 V to 20 V |
| Bootstrap Supply (VBS) | — | 10 V to 20 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.6 A |
| VS Transient Range | — | -5 V to +600 V (logic operational) |
| Undervoltage Lockout | — | Yes (VCC and VBS) |
| Propagation Delay Matching | — | Matched both channels |
| dV/dt Immunity | — | Yes (latch-immune CMOS) |
| Packaging | — | Tape & Reel (TRPBF) |
| Technology | — | HVIC + latch-immune CMOS |