IR2101STRPBF vs IRS2101STRPBF Comparación
Comparación detallada lado a lado de IR2101STRPBF por Infineon y IRS2101STRPBF por Infineon. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | IR2101STRPBF | IRS2101STRPBF |
|---|---|---|
| Marca | Infineon | Infineon |
| Categoría | Power MOSFET Drivers | Power MOSFET Drivers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,68 | $1,18 |
| Configuration | Half-Bridge (High-Side and Low-Side), Independent | — |
| Number of Drivers | 2 | 2 |
| Driver Type | Non-Inverting | High-Side, Low-Side (Half-Bridge) |
| Maximum Offset Voltage | 600 V | 600 V |
| Gate Drive Supply Voltage (VCC) | 10 V to 20 V | — |
| Source Current (Typ.) | 210 mA | — |
| Sink Current (Typ.) | 360 mA | — |
| Propagation Delay (Typ.) | 160 ns | — |
| Rise Time (Typ.) | [DATA_NEEDED: rise time] | — |
| Fall Time (Typ.) | [DATA_NEEDED: fall time] | — |
| Logic Input Compatibility | 3.3 V / 5 V / 15 V CMOS/LSTTL | 3.3 V / 5 V / 15 V |
| Bootstrap Diode | Integrated | — |
| Undervoltage Lockout (UVLO) | Yes (VCC and VBS) | — |
| Negative Transient Immunity on VS | Yes (dV/dt immune) | — |
| Encapsulado | 8-SOIC (0.154 inch, 3.90 mm Width) | 8-SOIC (SOIC-8) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | -40 C to +125 C | -40C to +125C |
| Nivel MSL | MSL 3 | — |
| Estado RoHS | Compliant | Compliant (PBF suffix) |
| Número de salidas | — | 2-OUT |
| Configuración de salida | — | Non-Inverting |
| Gate Drive Supply (VCC) | — | 10 V to 20 V |
| Bootstrap Supply (VBS) | — | 10 V to 20 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.6 A |
| VS Transient Range | — | -5 V to +600 V (logic operational) |
| Undervoltage Lockout | — | Yes (VCC and VBS) |
| Propagation Delay Matching | — | Matched both channels |
| dV/dt Immunity | — | Yes (latch-immune CMOS) |
| Packaging | — | Tape & Reel (TRPBF) |
| Technology | — | HVIC + latch-immune CMOS |