K4S641632H-UC75 vs K4S641632K-UC75 Comparaison
Comparaison détaillée côte à côte de K4S641632H-UC75 par Samsung Electronics et K4S641632K-UC75 par Samsung Electro-Mechanics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Samsung Electronics
K4S641632H-UC75 - 64Mb H-die SDRAM 1M x 16 x 4 Banks | Samsung
K4S641632H-UC75 ObsoleteSamsung Electro-Mechanics
K4S641632K-UC75 - 64Mb SDRAM 4Mx16 3.3V 54-TSOP II | Samsung
K4S641632K-UC75 ✓ ActifComparaison des spécifications
| Paramètre | K4S641632H-UC75 | K4S641632K-UC75 |
|---|---|---|
| Marque | Samsung Electronics | Samsung Electro-Mechanics |
| Catégorie | Memory ICs | Memory ICs |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $2,85 | $0,92 |
| Density | 64 Mb (67,108,864 bits) | 64 Mbit (67,108,864 bits) |
| Organisation de la mémoire | 1M x 16 bits x 4 Banks | 4 banks x 1,048,576 words x 16 bits (4Mx16) |
| Type de mémoire | SDRAM (Synchronous DRAM) | Synchronous DRAM (SDR SDRAM) |
| Clock Frequency | 133 MHz | — |
| Supply Voltage (VDD/VDDQ) | 3.3 V | 3.3 V +/- 0.3 V |
| Interface | LVCMOS | 16-bit data bus, LVTTL-compatible |
| Max Operating Current | 135 mA | — |
| Température de fonctionnement | 0C to +70C (Commercial) | 0 C to +70 C (Commercial) |
| Package Type | 54-pin TSOP-II | — |
| Lead Finish | Pb-Free (RoHS compliant) | — |
| Bank Architecture | 4 Banks | — |
| Burst Length | 1, 2, 4, 8, Full Page | 1, 2, 4, 8 or full page |
| Burst Type | Sequential or Interleave | — |
| Address Multiplexing | Yes (RAS#, CAS# controlled) | Row: 12 bits, Column: 8 bits |
| Refresh | Auto-Refresh and Self-Refresh | — |
| Process Technology | Samsung high-performance CMOS | Samsung high-performance CMOS |
| Data Width | 16 bits | — |
| Speed Grade | — | UC75 (133 MHz, CAS Latency 3, tCK = 7.5 ns) |
| Fréquence d'horloge maximale | — | 133 MHz |
| CAS Latency (CL) | — | 2 or 3 (programmable) |
| Refresh Cycles | — | 4096 (64 ms refresh interval) |
| Number of Banks | — | 4 |
| Boîtier | — | 54-pin TSOP-II |
| Package Outline | — | 10.16 mm x 22.22 mm, 0.8 mm pitch |
| Type de montage | — | Surface Mount (Tape & Reel) |
| Statut RoHS | — | Compliant |