MM74C949N vs ADC0809CCN Comparaison
Comparaison détaillée côte à côte de MM74C949N par Texas Instruments et ADC0809CCN par Texas Instruments. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | MM74C949N | ADC0809CCN |
|---|---|---|
| Marque | Texas Instruments | Texas Instruments |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $3,65 | $3,40 |
| Résolution | 8 bits | 8 bits |
| Number of Input Channels | 8 (single-ended, multiplexed) | — |
| Conversion Architecture | Successive Approximation (SAR) | — |
| Conversion Time | 116 microseconds (typical) | — |
| Tension d'alimentation | 5 V (single supply) | — |
| Analog Input Type | Single-ended, 8-channel MUX | — |
| Digital Interface | 8-bit microprocessor-compatible, tri-state outputs | — |
| Boîtier | 28-PDIP (Plastic DIP, 28-pin) | 28-pin PDIP (through-hole) |
| Plage de température de fonctionnement | -40 C to +85 C | — |
| Output Code | Binary (unipolar) | — |
| Technology | CMOS | — |
| Sample-and-Hold | Internal | — |
| Reference | Internal (external reference option [DATA_NEEDED: pin details]) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status - legacy part predates RoHS directive; check distributor listings] | Compliant (NOPB variant); non-compliant legacy |
| Nombre de broches | 28 | — |
| Type de montage | Through-Hole (DIP) | Through-Hole (DIP) |
| Statut du cycle de vie | Obsolete / End of Life (per GlobalSpec listing) | — |
| Architecture | — | Successive Approximation (SAR) |
| Number of Channels | — | 8 single-ended |
| Sample Rate (max) | — | 10 kSPS |
| Input Type | — | Single-Ended, Multiplexed |
| Supply Voltage (VCC) | — | 4.5 V to 5.25 V (5 V typical) |
| Courant d'alimentation | — | [DATA_NEEDED: typical quiescent current] |
| Analog Input Voltage Range | — | 0 V to VCC |
| Integral Nonlinearity (INL) | — | ±1 LSB max |
| Differential Nonlinearity (DNL) | — | ±1 LSB max (no missing codes) |
| Conversion Time (typ) | — | [DATA_NEEDED: at fCLK] |
| Clock Frequency | — | 10 kHz to 1.1 MHz |
| Tension de référence | — | Internal 256R ladder, VREF+ / VREF- pins |
| Digital I/O Logic Level | — | TTL/CMOS compatible |
| Température de fonctionnement | — | -40 °C to +85 °C |
| Output Interface | — | 8-bit parallel, tri-state latched |
| Channel Selection | — | 3-bit address latch (A0/A1/A2) |