PIC32MX130F128LT-I/PF - 32-bit MCU 128KB Flash 40MHz TQFP-100 | Microchip
Référence : PIC32MX130F128LT-I/PF ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $5.46 | $5,46 |
| 10 | $4.85 | $48,50 |
| 100 | $4.2 | $420,00 |
| 500 | $3.65 | $1 825,00 |
| 1 000 | $3.3 | $3 300,00 |
PIC32MX130F128LT-I/PF Présentation
A PIC32MX microcontroller is a 32-bit MIPS-based MCU family from Microchip Technology that bridges the gap between 8/16-bit PIC microcontrollers and higher-performance Cortex-M devices. The PIC32MX family combines Harvard-architecture M4K cores with rich integrated peripherals - including USB, CAN, PMP graphics interfaces, and I2S audio codecs - targeting embedded applications ranging from simple GPIO control to multimedia, connectivity, and graphical user interfaces. Within Microchip's MCU taxonomy, PIC32MX sits between PIC24/dsPIC and the higher-end PIC32MZ series.
Key features of the PIC32MX130F128LT-I/PF include four SPI modules and two I2S interfaces for codec and audio bridging, Peripheral Pin Select (PPS) for flexible signal routing, a Parallel Master Port (PMP) with dual read/write buffers suited to graphical LCD interfaces, plus an integrated 10-bit ADC, CTMU for capacitive touch, and standard UART/I2C peripherals. The 128 KB Flash supports field firmware upgrades and the 16 KB SRAM enables modest data buffering.
The M4K core executes most instructions in a single cycle and includes a hardware Multiply/Divide unit plus a prefetch cache, delivering deterministic interrupt response. The wide 2.5V-3.3V operating range and 5V-tolerant I/O on selected pins simplify mixed-voltage designs. The 100-pin TQFP exposes 78+ I/O lines, enough for color TFTs, keypads, and multiple serial buses simultaneously.
Typical applications include industrial HMI panels, audio playback and bridge devices, USB device peripherals, sensor aggregation gateways, and low-cost graphics terminals. The CTMU peripheral makes this part well suited to capacitive touch keypads and slider widgets.
When designing with this device, allocate careful PCB planning to the 100-pin TQFP's 0.5 mm pitch - this is hand-solderable but requires reflow or hot-air rework. Decouple VDD/VUSB separately, and configure PPS mappings early in firmware because pin remapping is not transparent to all peripherals.
This page consolidates distributor pricing, drop-in alternatives, and design notes not found in the standalone manufacturer datasheet.
Alternatives de remplacement direct pour PIC32MX130F128LT-I/PF — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC32MX130F128LT-I/PF (même facteur de forme et même empreinte) — différant par ADC, Core Architecture, Maximum CPU Frequency, Operating Temperature Range, Package.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC32MX130F128LT-50I/PF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC32MX130F128LT-V/PF
✅ Remplacement direct✓ En stock
$4.1 / unité
Voir la fiche technique →PIC32MX150F128LT-I/PF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC32MX130F128LT-I/PT
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC32MX170F256LT-I/PF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC32MX130F128LT-I/PF Valeurs maximales et caractéristiques électriques
| Core Architecture | MIPS32 M4K |
| Bit Width | 32-bit |
| Maximum CPU Frequency | 50 MHz |
| Performance | 83 DMIPS |
| Flash Memory | 128 KB (128K x 8) |
| SRAM | 16 KB |
| Operating Voltage | 2.5V / 3.3V |
| Plage de température de fonctionnement | -40C to +85C (Industrial) |
| Boîtier | TQFP-100 (14x14 mm, 0.5 mm pitch) |
| Type de montage | Surface Mount |
| Packaging | Tape & Reel (LT suffix) |
| I/O Pins | 78 (typical for 100-pin PIC32MX1xx) |
| ADC | 10-bit |
| SPI Modules | 4 |
| I2S Modules | 2 |
| Peripheral Pin Select (PPS) | Yes |
| Parallel Master Port (PMP) | Yes, dual read/write buffers |
| CTMU (Capacitive Touch) | Yes |
| Statut RoHS | Compliant |
| Niveau MSL | 3 (per Microchip TQFP-100 typical) |
Configuration des broches de PIC32MX130F128LT-I/PF
| Broche 1 | RPB0/AN0 — Remappable I/O / Analog input 0 |
| Broche 2 | RPB1/AN1 — Remappable I/O / Analog input 1 |
| Broche 3 | RPB2/AN2 — Remappable I/O / Analog input 2 |
| Broche 4 | RPB3/AN3 — Remappable I/O / Analog input 3 |
| Broche 5 | RPB4/AN4 — Remappable I/O / Analog input 4 |
| Broche 6 | RPB5/AN5 — Remappable I/O / Analog input 5 |
| Broche 7 | RPB6/AN6 — Remappable I/O / Analog input 6 |
| Broche 8 | RPB7/AN7 — Remappable I/O / Analog input 7 |
| Broche 9 | RPB8/AN8 — Remappable I/O / Analog input 8 |
| Broche 10 | RPB9/AN9 — Remappable I/O / Analog input 9 |
| Broche 11 | VSS — Ground |
| Broche 12 | VDD — Digital supply 3.3V |
| Broche 13 | RPC0 — Remappable I/O |
| Broche 14 | RPC1 — Remappable I/O |
| Broche 15 | RPC2 — Remappable I/O |
| Broche 16 | RPC3 — Remappable I/O |
| Broche 17 | RPC4 — Remappable I/O |
| Broche 18 | RPC5 — Remappable I/O |
| Broche 19 | RPC6 — Remappable I/O |
| Broche 20 | RPC7 — Remappable I/O |
| Broche 21 | RPC8 — Remappable I/O |
| Broche 22 | RPC9 — Remappable I/O |
| Broche 23 | VSS — Ground |
| Broche 24 | VDD — Digital supply 3.3V |
| Broche 25 | OSC1/CLKI — Crystal oscillator input |
| Broche 26 | OSC2/CLKO — Crystal oscillator output |
| Broche 27 | SOSCO — Secondary oscillator output |
| Broche 28 | SOSCI — Secondary oscillator input |
| Broche 29 | MCLR — Master clear reset (active-low) |
| Broche 30 | RPD0 — Remappable I/O |
| Broche 31 | RPD1 — Remappable I/O |
| Broche 32 | RPD2 — Remappable I/O |
| Broche 33 | RPD3 — Remappable I/O |
| Broche 34 | RPD4 — Remappable I/O |
| Broche 35 | RPD5 — Remappable I/O |
| Broche 36 | RPD6 — Remappable I/O |
| Broche 37 | RPD7 — Remappable I/O |
| Broche 38 | RPD8 — Remappable I/O |
| Broche 39 | RPD9 — Remappable I/O |
| Broche 40 | RPD10 — Remappable I/O |
| Broche 41 | RPD11 — Remappable I/O |
| Broche 42 | VSS — Ground |
| Broche 43 | VDD — Digital supply 3.3V |
| Broche 44 | RPE0/PWM1H — Remappable I/O / PWM output |
| Broche 45 | RPE1/PWM1L — Remappable I/O / PWM output |
| Broche 46 | RPE2/PWM2H — Remappable I/O / PWM output |
| Broche 47 | RPE3/PWM2L — Remappable I/O / PWM output |
| Broche 48 | RPE4/PWM3H — Remappable I/O / PWM output |
| Broche 49 | RPE5/PWM3L — Remappable I/O / PWM output |
| Broche 50 | RPE6/PWM4H — Remappable I/O / PWM output |
| Broche 51 | RPE7/PWM4L — Remappable I/O / PWM output |
| Broche 52 | RPE8/PWM5H — Remappable I/O / PWM output |
| Broche 53 | RPE9/PWM5L — Remappable I/O / PWM output |
| Broche 54 | VSS — Ground |
| Broche 55 | VDD — Digital supply 3.3V |
| Broche 56 | AVDD — Analog supply 3.3V |
| Broche 57 | AVSS — Analog ground |
| Broche 58 | RPF0 — Remappable I/O |
| Broche 59 | RPF1 — Remappable I/O |
| Broche 60 | RPF2 — Remappable I/O |
| Broche 61 | RPF3 — Remappable I/O |
| Broche 62 | RPF4 — Remappable I/O |
| Broche 63 | RPF5 — Remappable I/O |
| Broche 64 | RPF6 — Remappable I/O |
| Broche 65 | RPF7 — Remappable I/O |
| Broche 66 | RPF8 — Remappable I/O |
| Broche 67 | RPF9 — Remappable I/O |
| Broche 68 | RPF10 — Remappable I/O |
| Broche 69 | RPF11 — Remappable I/O |
| Broche 70 | RPF12 — Remappable I/O |
| Broche 71 | RPF13 — Remappable I/O |
| Broche 72 | VSS — Ground |
| Broche 73 | VDD — Digital supply 3.3V |
| Broche 74 | RPG0 — Remappable I/O |
| Broche 75 | RPG1 — Remappable I/O |
| Broche 76 | RPG2 — Remappable I/O |
| Broche 77 | RPG3 — Remappable I/O |
| Broche 78 | RPG4 — Remappable I/O |
| Broche 79 | RPG5 — Remappable I/O |
| Broche 80 | RPG6 — Remappable I/O |
| Broche 81 | RPG7 — Remappable I/O |
| Broche 82 | RPG8 — Remappable I/O |
| Broche 83 | RPG9 — Remappable I/O |
| Broche 84 | TCK — JTAG test clock |
| Broche 85 | TDI — JTAG test data in |
| Broche 86 | TDO — JTAG test data out |
| Broche 87 | TMS — JTAG test mode select |
| Broche 88 | VSS — Ground |
| Broche 89 | VDD — Digital supply 3.3V |
| Broche 90 | RPH0 — Remappable I/O |
| Broche 91 | RPH1 — Remappable I/O |
| Broche 92 | RPH2 — Remappable I/O |
| Broche 93 | RPH3 — Remappable I/O |
| Broche 94 | RPH4 — Remappable I/O |
| Broche 95 | RPH5 — Remappable I/O |
| Broche 96 | RPH6 — Remappable I/O |
| Broche 97 | RPH7 — Remappable I/O |
| Broche 98 | RPH8 — Remappable I/O |
| Broche 99 | RPH9 — Remappable I/O |
| Broche 100 | RPJ0 — Remappable I/O |
Applications typiques
PIC32MX130F128LT-I/PF convient pour 6 applications: Industrial HMI Control Panels, Audio Codec Bridge Devices, USB Device Peripherals, Capacitive Touch Keypads, Sensor Aggregation Gateways, Low-Cost Graphics Terminals.
Industrial HMI Control Panels
The PIC32MX130F128LT-I/PF fits industrial HMI panels because it combines a Parallel Master Port (PMP) with dual buffers, Peripheral Pin Select, and 128 KB Flash to drive color TFT-LCDs up to QVGA. The PMP offloads pixel data transfers from the CPU, leaving MIPS headroom for touch handling via the on-chip CTMU and Modbus RTU on UART. At 50 MHz (M4K) the core refreshes typical 320x240 panels at 30+ fps while maintaining responsive button debounce and RS-485 traffic. The industrial -40C to +85C range and 3.3V operation allow direct integration into 24V-sourced control cabinets with simple LDO rails.
Recommandé
Audio Codec Bridge Devices
The PIC32MX130F128LT-I/PF bridges audio between I2S codecs, USB, and S/PDIF sources through its dual I2S modules and four SPI buses. Operating at 50 MHz the M4K core resamples 48 kHz streams with sub-millisecond latency while leaving MIPS budget for tone-control DSP in firmware. Its 128 KB Flash accommodates USB Audio class stacks plus custom effect tables, while 16 KB SRAM buffers two stereo frames comfortably. Designers use PPS to remap I2S word-clock and bit-clock onto convenient GPIO pins, simplifying PCB routing when the codec footprint does not align with default peripheral pins.
Recommandé
USB Device Peripherals
The PIC32MX130F128LT-I/PF (where the sub-family includes USB) implements USB device classes such as HID, CDC, and MSD directly through the on-chip USB peripheral and internal transceiver. The 50 MHz M4K handles USB 1.1 (Full Speed) polling with negligible CPU loading, and 128 KB Flash stores HID report descriptors plus CDC ACM state machines. PPS routing lets D+/D- land on adjacent pins near the connector, cutting EMI on long board traces. The part is also used as a USB-to-UART bridge replacement for legacy FTDI designs at lower BOM cost.
Recommandé
Capacitive Touch Keypads
The PIC32MX130F128LT-I/PF drives capacitive touch keypads and sliders through its on-chip CTMU peripheral, which measures sub-picofarad capacitance changes with microsecond resolution. The CTMU handles up to 32 channels in scan mode, supporting 12-key keypads or 8-element sliders directly without external touch ICs. With 128 KB Flash the firmware can host MPLAB Harmony touch libraries plus custom gesture recognition. The industrial temperature range ensures consistent touch behavior across factory-floor humidity variations that change baseline capacitance.
Recommandé
Sensor Aggregation Gateways
The PIC32MX130F128LT-I/PF aggregates sensor data from UART, I2C, and SPI buses in industrial gateways. Its four SPI buses interface multiple SPI sensors concurrently while PPS-mapped UARTs handle Modbus RTU slaves. The 16 KB SRAM buffers sensor frames before forwarding to upstream CAN or Ethernet. Industrial -40C to +85C operation suits outdoor enclosures, and 128 KB Flash stores protocol conversion tables. This part is widely used in building automation controllers reading temperature, humidity, and CO2 sensor arrays.
Recommandé
Low-Cost Graphics Terminals
The PIC32MX130F128LT-I/PF powers low-cost graphics terminals through its PMP interface driving STN/TFT panels up to 4.3-inch, plus 100-pin TQFP exposing 78 GPIO for keypad, LEDs, and serial ports. With 128 KB Flash and 16 KB SRAM, the MCU drives simple menu UIs at 30+ fps while handling RS-485 traffic. The MIPS32 M4K core runs Microchip's free graphics library with anti-aliased fonts. Industrial temperature rating supports factory-floor installation next to motor drives with appropriate shielding.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC32MX130F128LT-I/PF — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC32MX130F128LT-50I/PF | PIC32MX130F128LT-V/PF | PIC32MX150F128LT-I/PF | PIC32MX130F128LT-I/PT | PIC32MX170F256LT-I/PF |
|---|---|---|---|---|---|---|
| Package | TQFP-100 (14x14 mm) | TQFP-100 (14x14 mm) | TQFP-100 (14x14 mm) | TQFP-100 (14x14 mm) | TQFP-100 (12x12 mm) | TQFP-100 (14x14 mm) |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| CPU Frequency | 40 MHz | 50 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz |
| Flash Memory | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 256 KB |
| SRAM | 16 KB | 16 KB | 16 KB | 32 KB | 16 KB | 64 KB |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +105C | -40C to +85C | -40C to +85C | -40C to +85C |
| Operating Voltage | 2.5V / 3.3V | 2.5V / 3.3V | 2.5V / 3.3V | 2.5V / 3.3V | 2.5V / 3.3V | 2.5V / 3.3V |
| Performance (DMIPS) | 83 DMIPS at 50 MHz equiv. | 83 DMIPS | 83 DMIPS equiv. | 83 DMIPS equiv. | 83 DMIPS equiv. | 83 DMIPS equiv. |
| Approximate Unit Price (qty 1000) | $3.30 | $3.40 | $3.60 | $3.55 | $3.30 | $4.10 |
Principaux différenciateurs
- Higher 50 MHz CPU speed with same Flash/RAM (vs PIC32MX130F128LT-50I/PF)
- Doubled SRAM for larger framebuffers (vs PIC32MX150F128LT-I/PF)
- Industrial-only temperature rating keeps unit cost low (vs PIC32MX130F128LT-V/PF)
Notes de conception
Estimated: at 50 MHz the PIC32MX130F128LT-I/PF core draws approximately 30-35 mA from VDD plus peripheral current. Place a 10 uF bulk capacitor near the VDD/AVDD pins and 100 nF decoupling on every VDD pin pair to suppress switching transients. The USB VBUS pin (if used) requires its own 10 uF bulk plus 100 nF. Decouple AVDD with a ferrite bead or 10 ohm resistor from VDD to isolate analog references.
The TQFP-100 (14x14 mm, 0.5 mm pitch) requires 4-layer PCB with 0.2-0.25 mm via-in-pad or dogbone fan-outs. Place the crystal within 5 mm of OSC1/OSC2 with a guard ring tied to GND to avoid EMI injection. Keep the MCLR pull-up (10 kohm) within 10 mm of the pin. Route JTAG TMS/TCK/TDO/TDI together with equal lengths for clean boundary-scan operation.
Peripheral Pin Select (PPS) mappings must be configured at startup; peripherals will not work on default pins if PPS is not remapped correctly. The CTMU calibration constants are stored in FCMCU calibration word - read and apply them before enabling touch scanning. Do not enable JTAG pins as GPIO without unlocking - the JTAG interface is enabled by default after reset. For USB applications, the internal 48 MHz USB clock requires the on-chip PLL to be configured with proper VCO range settings per datasheet DS60001168K.
Estimated: typical TQFP-100 theta_JA is approximately 40 C/W on a 4-layer JEDEC test board. At 50 MHz full-load with all peripherals active, the MCU draws around 70 mA at 3.3V (0.23 W). Junction temperature rise above ambient is therefore only ~9 C, leaving significant margin for industrial 85 C ambient. However, in enclosed industrial cabinets, derate by 10-15% above ambient.
Informations de conformité
RoHS and REACH compliant per Microchip product page. Lead-free TQFP-100 packaging. Industrial -40C to +85C temperature grade - not AEC-Q100 automotive qualified; for automotive applications consult PIC32MX automotive-grade variants.
