STM32F105VCT6 - 72MHz Cortex-M3 MCU, 256KB Flash, USB OTG | ST
Référence : STM32F105VCT6| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $9.2 | $9,20 |
| 10 | $8.45 | $84,50 |
| 100 | $7.4 | $740,00 |
| 500 | $6.65 | $3 325,00 |
| 1 000 | $5.95 | $5 950,00 |
| 2 500 | $5.4 | $13 500,00 |
STM32F105VCT6 Présentation
A microcontroller (MCU) is a single-chip computer that integrates a processor core, program memory (typically Flash), data memory (SRAM), and a rich set of peripherals (timers, ADC, communication interfaces) onto one silicon die. MCUs sit at the heart of nearly every embedded system - from industrial PLCs and motor drives to consumer appliances and IoT edge nodes - executing deterministic real-time firmware that reads sensors and drives actuators. The Cortex-M3 architecture from ARM is a 32-bit RISC core designed for low-latency interrupt response, deterministic bit-manipulation, and high code density through the Thumb-2 instruction set.
Key features include a 72 MHz max CPU clock with single-cycle multiply and hardware divide, USB 2.0 Full-Speed OTG with on-chip PHY, two CAN 2.0B active interfaces, 10/100 Ethernet MAC (MII/RMII), up to 5 USARTs, 3 SPI, 2 I2C, a 1-mbx2C I2S, two 12-bit ADCs (1 Msps, 16 channels), one 12-bit DAC, plus an FSMC bus for external memory or parallel display. The 100-pin LQFP exposes 80+ GPIO across multiple 5V-tolerant banks, supporting flexible mixed-signal designs.
The part uses an internal 8 MHz RC and an optional 32.768 kHz LSE crystal for the RTC. Power is managed through three low-power modes (Sleep, Stop, Standby) with a typical run current of ~30 mA at 72 MHz and stop current below 50 uA. The 2.0V to 3.6V supply range supports both 3.3V and battery-backed designs.
Typical applications include industrial gateways with USB or CAN, USB HID/COM port devices, RS485/CAN industrial sensor nodes, motor control boards using CAN and timers, point-of-sale terminals, low-cost Ethernet-equipped embedded nodes, and human-machine interface panels driving LCDs through FSMC. Designers pick the F105 over the F103 when they need USB OTG host capability, dual CAN, or an integrated Ethernet MAC on the same die.
When designing with this MCU, allocate the FSMC bus carefully if you add an external SRAM or NOR Flash, since pin remapping can clash with timers and USARTs. Use ST's STM32CubeMX to validate alternate-function mapping before final layout, and check the errata sheet for early-revision silicon behavior on the Ethernet MAC and USB OTG PHY.
This page synthesizes distributor pricing, parametric alternatives, and practical design notes beyond the manufacturer datasheet to support BOM decisions and second-source planning.
Alternatives de remplacement direct pour STM32F105VCT6 — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec STM32F105VCT6 (même facteur de forme et même empreinte) — différant par Timers, ADC, Package, USB, I2C.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
STM32F105RCT6
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$4.85 / unité
Voir la fiche technique →STM32F107VCT6
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$6.95 / unité
Voir la fiche technique →STM32F103VCT6
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$2.68 / unité
Voir la fiche technique →GD32F105VCT6
✅ Remplacement direct✓ En stock
$1.55 / unité
Voir la fiche technique →STM32F105VCT7
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$7.65 / unité
Voir la fiche technique →STM32F105VBT6
✅ Remplacement direct ⚠️ Spécifications non vérifiées📋 Alternative de référence (hors catalogue)
STM32F105VCT6 Valeurs maximales et caractéristiques électriques
| Core Architecture | ARM Cortex-M3 (32-bit) |
| Core Max Frequency | 72 MHz |
| Program Memory (Flash) | 256 KB |
| SRAM | 64 KB |
| Operating Voltage (VDD) | 2.0 V to 3.6 V |
| Boîtier | LQFP-100 (14x14 mm) |
| Température de fonctionnement | -40 C to +85 C |
| GPIO Count | 80+ |
| USB | USB 2.0 Full-Speed OTG with on-chip PHY |
| CAN | 2x CAN 2.0B active |
| Ethernet | 10/100 MAC (MII/RMII) - external PHY required |
| USART/UART | 5 channels |
| SPI | 3 channels |
| I2C | 2 channels |
| ADC | 2x 12-bit, 1 Msps, 16 channels |
| DAC | 1x 12-bit |
| Timers | Advanced-control, general-purpose, basic, SysTick, watchdog |
| FSMC | Yes - external memory/display bus |
| DMA | 12 channels |
| Statut RoHS | Compliant |
Configuration des broches de STM32F105VCT6
| Broche 1 | PE2 — GPIO PE2 / TRACECLK |
| Broche 2 | PE3 — GPIO PE3 / TRACED0 |
| Broche 3 | PE4 — GPIO PE4 / TRACED1 |
| Broche 4 | PE5 — GPIO PE5 / TRACED2 |
| Broche 5 | PE6 — GPIO PE6 / TRACED3 |
| Broche 6 | VBAT — RTC backup supply |
| Broche 7 | PC13 — GPIO PC13 / Tamper-RTC |
| Broche 8 | PC14 — GPIO PC14 / OSC32_IN |
| Broche 9 | PC15 — GPIO PC15 / OSC32_OUT |
| Broche 10 | VSS_1 — Ground |
| Broche 11 | VDD_1 — Digital supply 2.0-3.6 V |
| Broche 12 | OSC_IN — HSE crystal oscillator input |
| Broche 13 | OSC_OUT — HSE crystal oscillator output |
| Broche 14 | NRST — Reset (active low) |
| Broche 15 | PC0 — GPIO PC0 / ADC12_IN10 |
| Broche 16 | PC1 — GPIO PC1 / ADC12_IN11 |
| Broche 17 | PC2 — GPIO PC2 / ADC12_IN12 |
| Broche 18 | PC3 — GPIO PC3 / ADC12_IN13 |
| Broche 19 | VSSA — Analog ground |
| Broche 20 | VDDA — Analog supply 2.0-3.6 V |
| Broche 21 | PA0 — GPIO PA0 / WKUP / ADC12_IN0 / TIM2_CH1 |
| Broche 22 | PA1 — GPIO PA1 / ADC12_IN1 / TIM2_CH2 |
| Broche 23 | PA2 — GPIO PA2 / ADC12_IN2 / TIM2_CH3 / USART2_TX |
| Broche 24 | PA3 — GPIO PA3 / ADC12_IN3 / TIM2_CH4 / USART2_RX |
| Broche 25 | VSS_2 — Ground |
| Broche 26 | VDD_2 — Digital supply 2.0-3.6 V |
| Broche 27 | PA4 — GPIO PA4 / ADC12_IN4 / SPI1_NSS / USART2_CK |
| Broche 28 | PA5 — GPIO PA5 / ADC12_IN5 / SPI1_SCK / DAC_OUT1 |
| Broche 29 | PA6 — GPIO PA6 / ADC12_IN6 / SPI1_MISO / TIM3_CH1 |
| Broche 30 | PA7 — GPIO PA7 / ADC12_IN7 / SPI1_MOSI / TIM3_CH2 |
| Broche 31 | PC4 — GPIO PC4 / ADC12_IN14 |
| Broche 32 | PC5 — GPIO PC5 / ADC12_IN15 |
| Broche 33 | PB0 — GPIO PB0 / ADC12_IN8 / TIM3_CH3 |
| Broche 34 | PB1 — GPIO PB1 / ADC12_IN9 / TIM3_CH4 |
| Broche 35 | PB2 — GPIO PB2 / BOOT1 |
| Broche 36 | PE7 — GPIO PE7 |
| Broche 37 | PE8 — GPIO PE8 / TIM1_CH1N |
| Broche 38 | PE9 — GPIO PE9 / TIM1_CH1 |
| Broche 39 | PE10 — GPIO PE10 / TIM1_CH2N |
| Broche 40 | PE11 — GPIO PE11 / TIM1_CH2 |
| Broche 41 | PE12 — GPIO PE12 / TIM1_CH3N |
| Broche 42 | PE13 — GPIO PE13 / TIM1_CH3 |
| Broche 43 | PE14 — GPIO PE14 / TIM1_CH4 |
| Broche 44 | PE15 — GPIO PE15 / TIM1_BKIN |
| Broche 45 | PB10 — GPIO PB10 / I2C2_SCL / USART3_TX |
| Broche 46 | PB11 — GPIO PB11 / I2C2_SDA / USART3_RX |
| Broche 47 | VSS_3 — Ground |
| Broche 48 | VDD_3 — Digital supply 2.0-3.6 V |
| Broche 49 | PB12 — GPIO PB12 / SPI2_NSS / I2S2_WS |
| Broche 50 | PB13 — GPIO PB13 / SPI2_SCK / I2S2_CK |
| Broche 51 | PB14 — GPIO PB14 / SPI2_MISO / TIM1_CH2N |
| Broche 52 | PB15 — GPIO PB15 / SPI2_MOSI / TIM1_CH3N |
| Broche 53 | PD8 — GPIO PD8 / USART3_TX / ETH_RMII_RX_DV |
| Broche 54 | PD9 — GPIO PD9 / USART3_RX / ETH_RMII_CRS_DV |
| Broche 55 | PD10 — GPIO PD10 |
| Broche 56 | PD11 — GPIO PD11 |
| Broche 57 | PD12 — GPIO PD12 / TIM4_CH1 |
| Broche 58 | PD13 — GPIO PD13 / TIM4_CH2 |
| Broche 59 | PD14 — GPIO PD14 / TIM4_CH3 |
| Broche 60 | PD15 — GPIO PD15 / TIM4_CH4 |
| Broche 61 | PC6 — GPIO PC6 / I2S2_MCK / TIM3_CH1 |
| Broche 62 | PC7 — GPIO PC7 / I2S2_CK / TIM3_CH2 |
| Broche 63 | PC8 — GPIO PC8 / TIM3_CH3 |
| Broche 64 | PC9 — GPIO PC9 / TIM3_CH4 |
| Broche 65 | PA8 — GPIO PA8 / USART1_CK / TIM1_CH1 / MCO |
| Broche 66 | PA9 — GPIO PA9 / USART1_TX / TIM1_CH2 |
| Broche 67 | PA10 — GPIO PA10 / USART1_RX / TIM1_CH3 |
| Broche 68 | PA11 — GPIO PA11 / USART1_CTS / CAN1_RX / USB_DM |
| Broche 69 | PA12 — GPIO PA12 / USART1_RTS / CAN1_TX / USB_DP |
| Broche 70 | PA13 — GPIO PA13 / JTMS / SWDIO |
| Broche 71 | VSS_4 — Ground |
| Broche 72 | VDD_4 — Digital supply 2.0-3.6 V |
| Broche 73 | PA14 — GPIO PA14 / JTCK / SWCLK |
| Broche 74 | PA15 — GPIO PA15 / JTDI / TIM2_CH1 / SPI1_NSS |
| Broche 75 | PC10 — GPIO PC10 / UART4_TX / SPI3_SCK |
| Broche 76 | PC11 — GPIO PC11 / UART4_RX / SPI3_MISO |
| Broche 77 | PC12 — GPIO PC12 / UART5_TX / SPI3_MOSI |
| Broche 78 | PD0 — GPIO PD0 / OSC_IN |
| Broche 79 | PD1 — GPIO PD1 / OSC_OUT |
| Broche 80 | PD2 — GPIO PD2 / TIM3_ETR / UART5_RX |
| Broche 81 | PD3 — GPIO PD3 / USART2_CTS |
| Broche 82 | PD4 — GPIO PD4 / USART2_RTS |
| Broche 83 | PD5 — GPIO PD5 / USART2_TX |
| Broche 84 | PD6 — GPIO PD6 / USART2_RX |
| Broche 85 | PD7 — GPIO PD7 / USART2_CK |
| Broche 86 | PB3 — GPIO PB3 / JTDO / SPI3_SCK / TIM2_CH2 |
| Broche 87 | PB4 — GPIO PB4 / NJTRST / SPI3_MISO / TIM3_CH1 |
| Broche 88 | PB5 — GPIO PB5 / I2C1_SMBAI / SPI3_MOSI / TIM3_CH2 |
| Broche 89 | PB6 — GPIO PB6 / I2C1_SCL / TIM4_CH1 |
| Broche 90 | PB7 — GPIO PB7 / I2C1_SDA / TIM4_CH2 |
| Broche 91 | BOOT0 — Boot mode select |
| Broche 92 | PB8 — GPIO PB8 / TIM4_CH3 |
| Broche 93 | PB9 — GPIO PB9 / TIM4_CH4 |
| Broche 94 | PE0 — GPIO PE0 / TIM4_ETR |
| Broche 95 | PE1 — GPIO PE1 |
| Broche 96 | VSS_5 — Ground |
| Broche 97 | VDD_5 — Digital supply 2.0-3.6 V |
| Broche 98 | PE2 — GPIO PE2 (alternate location, trace clock) |
| Broche 99 | PE3 — GPIO PE3 (alternate location) |
| Broche 100 | VSS_6 — Ground |
Applications typiques
STM32F105VCT6 convient pour 6 applications: Industrial Gateway with USB OTG + Dual CAN, USB HID / CDC / Mass-Storage Host Device, CAN-Based Motor Control / Sensor Node, Point-of-Sale / Kiosk Terminal, LCD HMI Panel Using FSMC, IoT Edge Sensor with USB Diagnostics Port.
Industrial Gateway with USB OTG + Dual CAN
The STM32F105VCT6's USB OTG Full-Speed host, dual CAN 2.0B active, and 5 USARTs in a single LQFP-100 package make it an ideal industrial gateway controller. The Cortex-M3 at 72 MHz with hardware divider can sustain CAN throughput of 1 Mbit/s per channel while also running USB CDC/ECM host stacks, making the part a natural fit for USB-to-CAN bridges, RS485-to-USB converters, and protocol gateway boards. The 256 KB Flash hosts a USB host stack plus a CANopen or Modbus library, leaving headroom for application code. Compared to using an F103, the F105 saves the BOM cost of an external USB controller and a second CAN transceiver MCU.
Recommandé
USB HID / CDC / Mass-Storage Host Device
The integrated USB 2.0 Full-Speed OTG controller with on-chip PHY makes the STM32F105VCT6 a strong choice for USB host and device peripherals such as USB keyboards, barcode scanners, USB-to-serial adapters, USB mass-storage bootloaders, and CDC-ACM bridges. The 72 MHz Cortex-M3 can sustain USB Full-Speed (12 Mbps) enumeration and bulk transfers without CPU bottlenecking, while the 256 KB Flash holds USB host class drivers plus application firmware. Designers pick the F478-variant F407 for higher-speed applications, but the F105VOTOTOTOSP6 hits the right cost point for HID and CDC class devices.
Recommandé
CAN-Based Motor Control / Sensor Node
With two independent CAN 2.0B controllers, six timers (one 16-bit advanced-control, two 16-bit general-purpose, plus basic and SysTick), the STM32F105VCT6 can serve as a CAN node that drives a brushed or stepper motor while reporting telemetry over the second CAN bus. The advanced-control timer supports center-aligned PWM with dead-time insertion for half-bridge motor drives, and the 32-bit Cortex-M3 handles PID control loops and CANopen DS402 profiles. The 80+ GPIO exposed by the LQFP-100 enable driving multiple motors or sensor arrays from a single chip.
Recommandé
Point-of-Sale / Kiosk Terminal
POS terminals and self-service kiosks need USB host for barcode readers and printers, Ethernet for cloud sync, and reliable real-time control for displays and keypads. The STM32F105VCT6 combines USB OTG host, 10/100 Ethernet MAC, FSMC for LCD expansion, and the Cortex-M3 72 MHz core - giving a single MCU all the interfaces a low-to-mid-volume POS terminal needs. The 256 KB Flash holds application firmware plus network protocol stacks, and 64 KB SRAM is sufficient for display buffer and TCP socket management when paired with a low-cost Ethernet PHY such as the LAN8720.
Recommandé
LCD HMI Panel Using FSMC
Although the STM32F105VCT6 lacks FSMC in some lineups, its LQFP-100 variant exposes parallel GPIO plus SPI/I2S interfaces that drive small TFT LCDs up to 320x240 directly. For larger 800x480 HMI panels requiring an external bus, the F105VCT6 can drive them through SPI with DMA, freeing CPU cycles for touch handling and UI logic. Designers pick the F105 for cost-sensitive HMI nodes; the F407 is the upgrade path for higher-resolution displays needing FSMC bandwidth.
Recommandé
IoT Edge Sensor with USB Diagnostics Port
Industrial IoT edge nodes often need a USB diagnostic port alongside Ethernet and CAN interfaces. The STM32F105VCT6 provides USB OTG device mode for diagnostics, an Ethernet MAC for cloud uplink, and dual CAN for sensor bus access, in a single 256 KB Flash MCU. The 64 KB SRAM handles MQTT-style buffering and CAN frame queues, while the RTC with VBAT domain allows battery-backed timestamping for sensor data. This is the typical connectivity-line use case the STM32F105 was designed for.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour STM32F105VCT6 — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | STM32F105RCT6 | STM32F107VCT6 | STM32F103VCT6 | GD32F105VCT6 | STM32F105VCT7 | STM32F105VBT6 |
|---|---|---|---|---|---|---|---|
| Brand | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics | GigaDevice | STMicroelectronics | STMicroelectronics |
| Package | LQFP-100 | LQFP-64 | LQFP-100 - same | LQFP-100 - same | LQFP-100 - same | LQFP-100 - same | LQFP-100 - same |
| Core | Cortex-M3 72 MHz | Cortex-M3 72 MHz | Cortex-M3 72 MHz | Cortex-M3 72 MHz | Cortex-M3 108 MHz | Cortex-M3 72 MHz | Cortex-M3 72 MHz |
| Flash | 256 KB | 256 KB | 256 KB | 256 KB | 256 KB | 256 KB | 128 KB |
| SRAM | 64 KB | 64 KB | 64 KB | 64 KB | 64 KB | 64 KB | 64 KB |
| USB OTG | Yes (Host + Device) | Yes (Host + Device) | Yes (Host + Device) | Device only (no OTG host) | Yes (Host + Device) | Yes (Host + Device) | Yes (Host + Device) |
| CAN 2.0B | 2x bxCAN | 2x bxCAN | 2x bxCAN | 1x bxCAN | 2x bxCAN | 2x bxCAN | 2x bxCAN |
| Ethernet MAC | Yes (MII/RMII) | Yes (MII/RMII) | Yes (MII/RMII) | No | Yes (MII/RMII) | Yes (MII/RMII) | Yes (MII/RMII) |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +105C | -40C to +85C |
Principaux différenciateurs
- True USB OTG host + dual CAN + Ethernet MAC on a single Cortex-M3 (vs STM32F103VCT6)
- Pin-compatible Cortex-M3 with higher 108 MHz clock for faster response (vs GD32F105VCT6)
- Drop-in upgrade with extended industrial temperature range (vs STM32F105VCT7)
Notes de conception
Estimated: at 72 MHz run mode, the STM32F105VCT6 consumes approximately 30 mA on VDD with peripherals active. Use a 100 nF decoupling cap on each VDD/VSS pin pair and a 4.7 uF bulk cap near the VDDA pin. Place VBAT through a 0.1 uF cap and a Schottky diode when sharing with the main 3.3 V rail to allow RTC retention when VDD drops.
Route the HSE 8 MHz crystal traces as short as possible and guard them with a ground ring to minimize EMI. The USB DP/DM pair (PA11/PA12) requires 90-ohm differential routing and a 1.5 kohm pull-up on DP for full-speed device mode - place these resistors as close to the MCU as practical. For Ethernet RMII, the 50 MHz reference clock trace to the external PHY must be length-matched to within 50 mils to keep skew under 4 ns.
Do not enable both the JTAG and SWD pins (PA13/14/PB3/PB4) without considering firmware remapping, since the F105VCT6 default state uses PA13/PA14 for SWD and remaps PB3/PB4 to JTAG trace pins. Designers using TIM2_CH1 on PA15 must also remember PA15 is the JTDI pin, which requires disabling JTAG to use as a normal GPIO. Validate alternate-function mapping with STM32CubeMX before committing to a pinout.
The LQFP-100 package has a theta_JA around 65 C/W on a standard 2-layer JEDEC test board. Estimated: at full 72 MHz load with all peripherals enabled, the chip typically dissipates around 100 mW, producing a 6-7 C junction rise. Industrial designs at 85 C ambient are well within the 105 C Tj max, but enclosed industrial enclosures may push ambient above 70 C - verify thermal margin with a real prototype.
Informations de conformité
RoHS and REACH compliant per ST product documentation. Industrial grade - not AEC-Q100 qualified; choose STM32F105VCT7 automotive grade or ST's dedicated automotive parts for vehicle applications. Halogen-free status not explicitly stated in the verified web data.
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