A3PE3000-2FGG896 vs A3PE3000L-FGG896M तुलना
विस्तृत दोनों ओर की तुलना A3PE3000-2FGG896 द्वारा Microchip Technology और A3PE3000L-FGG896M द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
A3PE3000-2FGG896 - 3M-Gate ProASIC3E Flash FPGA | Microchip
A3PE3000-2FGG896 ✓ सक्रियMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ सक्रियविशेषता तुलना
| पैरामीटर | A3PE3000-2FGG896 | A3PE3000L-FGG896M |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | ProASIC3E | ProASIC3L (Flash-based FPGA) |
| Number of System Gates | 3,000,000 | — |
| Number of I/Os | 620 | — |
| Supply Voltage (Core) | 1.425 V to 1.575 V (1.5 V nominal) | — |
| Speed Grade | -2 | — |
| पैकेज | 896-BGA / 896-FBGA (31x31 mm, 1.0 mm ball pitch) | 896-ball FBGA (FGG896), 1 mm pitch |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| ऑपरेटिंग तापमान | 0C to 85C (TJ) | 0 to 70 C |
| Configuration Memory | On-chip Flash (non-volatile, single chip) | — |
| Technology | CMOS flash | — |
| Soft ARM Support | Optional (per ProASIC3E datasheet) | — |
| Packaging | Tray | — |
| RoHS स्थिति | ROHS3 Compliant (G suffix) | — |
| Manufacturer Lead Time | 8 weeks | — |
| Product Status | Active | — |
| Total System Performance | [DATA_NEEDED: system performance] | — |
| System Gates | — | 3,000,000 |
| Logic Cells | — | 75,264 |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Process Technology | — | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Core Voltage | — | 1.2 V to 1.5 V |
| सप्लाई वोल्टेज | — | 1.5 V |
| Logic Family | — | CMOS |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |