A3PE3000-2FGG896 vs A3PE3000L-FGG896M Perbandingan
Perbandingan bersamaan detil A3PE3000-2FGG896 dari Microchip Technology dan A3PE3000L-FGG896M dari Microchip Technology. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Microchip Technology
A3PE3000-2FGG896 - 3M-Gate ProASIC3E Flash FPGA | Microchip
A3PE3000-2FGG896 ✓ AktifMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ AktifPerbandingan Spesifikasi
| Parameter Umum | A3PE3000-2FGG896 | A3PE3000L-FGG896M |
|---|---|---|
| Merek | Microchip Technology | Microchip Technology |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Family | ProASIC3E | ProASIC3L (Flash-based FPGA) |
| Number of System Gates | 3,000,000 | — |
| Number of I/Os | 620 | — |
| Supply Voltage (Core) | 1.425 V to 1.575 V (1.5 V nominal) | — |
| Speed Grade | -2 | — |
| Paket | 896-BGA / 896-FBGA (31x31 mm, 1.0 mm ball pitch) | 896-ball FBGA (FGG896), 1 mm pitch |
| Tipe Mounting | Surface Mount | Surface Mount |
| Suhu Kerja | 0C to 85C (TJ) | 0 to 70 C |
| Configuration Memory | On-chip Flash (non-volatile, single chip) | — |
| Technology | CMOS flash | — |
| Soft ARM Support | Optional (per ProASIC3E datasheet) | — |
| Packaging | Tray | — |
| Status RoHS | ROHS3 Compliant (G suffix) | — |
| Manufacturer Lead Time | 8 weeks | — |
| Product Status | Active | — |
| Total System Performance | [DATA_NEEDED: system performance] | — |
| System Gates | — | 3,000,000 |
| Logic Cells | — | 75,264 |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Process Technology | — | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Core Voltage | — | 1.2 V to 1.5 V |
| Tegangan Pemuat | — | 1.5 V |
| Logic Family | — | CMOS |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |