ADC12DL040CIVSX vs ADC12DL040CIVS तुलना
विस्तृत दोनों ओर की तुलना ADC12DL040CIVSX द्वारा Texas Instruments और ADC12DL040CIVS द्वारा Texas Instruments. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Texas Instruments
ADC12DL040CIVSX - Dual 12-Bit 40 MSPS ADC | Texas Instruments
ADC12DL040CIVSX ✓ सक्रियTexas Instruments
ADC12DL040CIVS - Dual 12-Bit 40 MSPS 3V ADC | Texas Instruments
ADC12DL040CIVS Nrndविशेषता तुलना
| पैरामीटर | ADC12DL040CIVSX | ADC12DL040CIVS |
|---|---|---|
| ब्रांड | Texas Instruments | Texas Instruments |
| श्रेणी | ADC/DAC | ADC/DAC |
| लाइफसाइकिल स्थिति | सक्रिय | NRND |
| रेज़ोल्यूशन | 12 bit | 12 Bits |
| Number of Channels | 2 (Dual) | 2 (dual, simultaneous sampling) |
| Sampling Rate (per channel) | 40 MSPS | — |
| Architecture | Pipelined CMOS | Pipelined CMOS |
| इनपुट वोल्टेज रेंज | 0.0 V to 2.6 V (analog input) | — |
| Analog Supply Voltage | 3 V (single supply) | 3.0 V (2.7 V to 3.6 V range) |
| Power Dissipation | 210 mW (typical, 3V, 40 MSPS) | — |
| Power Consumption per Channel | 105 mW (typical) | — |
| Data Interface | Parallel CMOS | — |
| Digital Output Format | [DATA_NEEDED: digital output format/code] | — |
| Reference Type | Internal (on-chip reference) | — |
| ऑपरेटिंग तापमान रेंज | -40C to +85C (Industrial) | — |
| पैकेज / केस | 64-TQFP (PAG) 10x10 mm | — |
| माउंटिंग प्रकार | Surface Mount | — |
| MSL स्तर | [DATA_NEEDED: MSL level] | — |
| Sample-and-Hold | Yes (integrated, per channel) | Internal, dual |
| Differential Nonlinearity (DNL) | [DATA_NEEDED: DNL bits LSB] | — |
| Integral Nonlinearity (INL) | [DATA_NEEDED: INL bits LSB] | — |
| Signal-to-Noise Ratio (SNR) | [DATA_NEEDED: SNR dB at 40 MSPS] | — |
| RoHS स्थिति | Compliant | — |
| Lead-Free | Yes | — |
| Sample Rate (per channel) | — | 40 MSPS |
| Digital Output Driver Supply | — | 2.4 V to 3.6 V (separate DVDD) |
| Power Dissipation (typical) | — | 210 mW |
| Power-Down Mode | — | Yes |
| SNR (fIN = 10 MHz) | — | 69 dB (typical) |
| SFDR (fIN = 10 MHz) | — | 85 dB (typical) |
| DNL (Differential Non-Linearity) | — | ±0.3 LSB (typical) |
| INL (Integral Non-Linearity) | — | [DATA_NEEDED: INL spec] |
| Internal Reference | — | Yes (factory-trimmed, not user-adjustable) |
| Duty Cycle Stabilizer | — | Yes |
| Multiplexed Output Mode | — | Yes (channels share single 12-bit bus) |
| Output Format | — | Straight Binary, offset binary, 2's complement (per pin strapping) |
| Input Clock | — | Single-ended or differential; 50 Ω terminated internally |
| ऑपरेटिंग तापमान | — | -40 °C to +85 °C (industrial) |
| पैकेज | — | 64-pin TQFP (PAG) 10x10 mm, surface-mount |
| MSL (Moisture Sensitivity Level) | — | [DATA_NEEDED: MSL level] |
| Lead Finish / RoHS | — | Lead-free / RoHS status depends on orderable suffix (see datasheet ordering info) |