ADC12DL040CIVSX vs ADC12DL040CIVS Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng ADC12DL040CIVSX sa pamamagitan ng Texas Instruments at ADC12DL040CIVS sa pamamagitan ng Texas Instruments. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Texas Instruments
ADC12DL040CIVSX ADC12DL040CIVSX - Dual 12-Bit 40 MSPS ADC | Texas Instruments

ADC12DL040CIVSX - Dual 12-Bit 40 MSPS ADC | Texas Instruments

ADC12DL040CIVSX ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro ADC12DL040CIVSX ADC12DL040CIVS
Brand Texas Instruments Texas Instruments
Kategorya ADC/DAC ADC/DAC
Katayuan ng Lifecycle Aktibo NRND
Pangangasiwaan 12 bit 12 Bits
Number of Channels 2 (Dual) 2 (dual, simultaneous sampling)
Sampling Rate (per channel) 40 MSPS —
Architecture Pipelined CMOS Pipelined CMOS
Hanay ng Voltage ng Input 0.0 V to 2.6 V (analog input) —
Analog Supply Voltage 3 V (single supply) 3.0 V (2.7 V to 3.6 V range)
Power Dissipation 210 mW (typical, 3V, 40 MSPS) —
Power Consumption per Channel 105 mW (typical) —
Data Interface Parallel CMOS —
Digital Output Format [DATA_NEEDED: digital output format/code] —
Reference Type Internal (on-chip reference) —
Hanay ng Temperature na Operasyon -40C to +85C (Industrial) —
Packhaging / Kaso 64-TQFP (PAG) 10x10 mm —
Uri ng Pagpapasok Surface Mount —
Level ng MSL [DATA_NEEDED: MSL level] —
Sample-and-Hold Yes (integrated, per channel) Internal, dual
Differential Nonlinearity (DNL) [DATA_NEEDED: DNL bits LSB] —
Integral Nonlinearity (INL) [DATA_NEEDED: INL bits LSB] —
Signal-to-Noise Ratio (SNR) [DATA_NEEDED: SNR dB at 40 MSPS] —
Tindminan RoHS Compliant —
Lead-Free Yes —
Sample Rate (per channel) — 40 MSPS
Digital Output Driver Supply — 2.4 V to 3.6 V (separate DVDD)
Power Dissipation (typical) — 210 mW
Power-Down Mode — Yes
SNR (fIN = 10 MHz) — 69 dB (typical)
SFDR (fIN = 10 MHz) — 85 dB (typical)
DNL (Differential Non-Linearity) — ±0.3 LSB (typical)
INL (Integral Non-Linearity) — [DATA_NEEDED: INL spec]
Internal Reference — Yes (factory-trimmed, not user-adjustable)
Duty Cycle Stabilizer — Yes
Multiplexed Output Mode — Yes (channels share single 12-bit bus)
Output Format — Straight Binary, offset binary, 2's complement (per pin strapping)
Input Clock — Single-ended or differential; 50 Ω terminated internally
Temperature na Operasyon — -40 °C to +85 °C (industrial)
Packhaging — 64-pin TQFP (PAG) 10x10 mm, surface-mount
MSL (Moisture Sensitivity Level) — [DATA_NEEDED: MSL level]
Lead Finish / RoHS — Lead-free / RoHS status depends on orderable suffix (see datasheet ordering info)

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