EP1810GM883 vs EP1810GI-45 तुलना
विस्तृत दोनों ओर की तुलना EP1810GM883 द्वारा Altera और EP1810GI-45 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP1810GM883 | EP1810GI-45 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | Classic EPLD (EP1810 series) | Altera Classic EPLD |
| Device Type | UV-Erasable Programmable Logic Device (EPLD) | UV Erasable Programmable Logic Device (EPLD) |
| Macrocells | 48 | 24 |
| Dedicated Inputs | 12 | — |
| User I/O Pins | 48 | — |
| Total Terminals | 68 | — |
| Global Clocks | 4 | — |
| Supply Voltage (Vcc) | 4.5 V to 5.5 V (nominal 5 V) | — |
| Propagation Delay (tpd) | 45 ns (max) | 45 ns |
| Maximum Toggle Frequency (fmax) | [DATA_NEEDED: fmax value not in source data; Classic EPLD family typical 35-80 MHz depending on grade] | — |
| Process Technology | CMOS, UV-erasable | — |
| पैकेज | 68-Pin Ceramic Pin Grid Array (PGA) | — |
| ऑपरेटिंग तापमान | -55C to +125C (MIL-STD-883 Class B) | [DATA_NEEDED: operating temperature range] |
| Screening | MIL-STD-883 Class B (suffix '883' denotes MIL processing) | — |
| माउंटिंग प्रकार | Through-Hole (PGA socket) | Through-Hole |
| RoHS स्थिति | [DATA_NEEDED: hermetic ceramic PGA is typically non-RoHS due to lead-bearing solder/finish; not confirmed in source data] | Non-compliant (ceramic PGA) |
| Lead-Free | [DATA_NEEDED: military 883B screened parts commonly use SnPb finish] | No |
| Flip-Flops | — | 48 |
| Speed Grade | — | -45 |
| Technology | — | CMOS |
| Package Type | — | Ceramic Pin Grid Array with UV window |
| पिन काउंट | — | 68 |
| Programmable | — | Yes (UV-erasable, electrically programmable) |
| सप्लाई वोल्टेज | — | [DATA_NEEDED: VCC range] |