EPM5130WC-1 vs EPM5130JI तुलना
विस्तृत दोनों ओर की तुलना EPM5130WC-1 द्वारा Intel और EPM5130JI द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
EPM5130WC-1 - 128-Macrocell 40ns UV CPLD, 100-pin CQFP | Intel (Altera) MAX 5000
EPM5130WC-1 Obsoleteविशेषता तुलना
| पैरामीटर | EPM5130WC-1 | EPM5130JI |
|---|---|---|
| ब्रांड | Intel | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Series | MAX 5000 | — |
| Manufacturer | Altera (now Intel) | — |
| Device Type | CPLD (Complex Programmable Logic Device) | UV-Erasable EPLD (CMOS EPROM) |
| Macrocell Count | 128 | — |
| Logic Array Blocks | Multiple LABs (per MAX 5000 architecture) | — |
| Propagation Delay (tpd) | 40 ns | — |
| अधिकतम क्लॉक फ़्रीक्वेंसी | 50 MHz | 33.3 MHz |
| Erasure Method | UV (ultraviolet, windowed package) | — |
| Process Technology | CMOS EPROM | 0.75 micron CMOS EPROM |
| User I/O Pins | Up to 100 | — |
| Package Type | 100-pin Ceramic QFP (Windowed) | Ceramic J-Leaded Chip Carrier (JLCC) with UV window |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| सप्लाई वोल्टेज | [DATA_NEEDED: VCC nominal] | 5 V (typical) |
| Programmable | Yes (UV-erasable, non-volatile) | — |
| Logic Family | MAX 5000 (Altera) | — |
| Configuration Memory | EPROM (on-chip) | — |
| माउंटिंग प्रकार | Surface Mount | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance] | Non-compliant (contains Pb in ceramic package) |
| Family | — | MAX 5000 |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD) | — | 55 ns |
| External Clock Inputs | — | 1 (shared input/clock) |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Input Logic Standard | — | TTL-compatible |
| Program/Erase Method | — | UV erasure through quartz window |
| Lifecycle | — | Obsolete - EOL by Altera/Intel |