EPM5192JC-2 vs EPM5192JC1 तुलना
विस्तृत दोनों ओर की तुलना EPM5192JC-2 द्वारा Altera और EPM5192JC1 द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPM5192JC-2 | EPM5192JC1 |
|---|---|---|
| ब्रांड | Altera | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Product Type | UV-erasable Programmable Logic Device (PLD) | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 12 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 45 ns | — |
| अधिकतम क्लॉक फ़्रीक्वेंसी | 40 MHz | — |
| Process Technology | CMOS | 0.5 µm CMOS, UV-erasable EPROM |
| पैकेज | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) | [DATA_NEEDED: exact package from datasheet] |
| माउंटिंग प्रकार | Surface Mount | [DATA_NEEDED: surface mount or through-hole] |
| Number of Terminals | 84 | — |
| Programming Method | UV-erase / EPROM | — |
| ऑपरेटिंग तापमान रेंज | [DATA_NEEDED: operating temperature range] | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance] | unknown |
| Family | — | MAX 5000 (MAX 5xxx CPLD) |
| Manufacturer | — | Intel (formerly Altera Corporation) |
| Macro Cells | — | 192 |
| Usable Gates | — | 3750 |
| Maximum Operating Frequency | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal) |
| Propagation Delay (typ) | — | [DATA_NEEDED: propagation delay in ns] |
| I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| ऑपरेटिंग तापमान | — | [DATA_NEEDED: operating temp range] |
| Programming Interface | — | JTAG-compatible (Altera MAX 5xxx) |
| Logic Blocks (LABs) | — | 24 (8 macrocells per LAB) |
| AEC-Q100 | — | not_applicable |
| Lifecycle | — | Obsolete - last-time-buy stock only at franchised distributors |