RTAX2000SL-1CGS624B vs RTAX2000SL-CGS624V तुलना

विस्तृत दोनों ओर की तुलना RTAX2000SL-1CGS624B द्वारा Microchip Technology और RTAX2000SL-CGS624V द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。

Microchip Technology
RTAX2000SL-1CGS624B RTAX2000SL-1CGS624B - Rad-Tolerant FPGA 2M Gates CCGA624 | Microchip

RTAX2000SL-1CGS624B - Rad-Tolerant FPGA 2M Gates CCGA624 | Microchip

RTAX2000SL-1CGS624B ✓ सक्रिय
Microchip Technology
RTAX2000SL-CGS624V RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000SL-CGS624V ✓ सक्रिय

विशेषता तुलना

पैरामीटर RTAX2000SL-1CGS624B RTAX2000SL-CGS624V
ब्रांड Microchip Technology Microchip Technology
श्रेणी FPGA & CPLD FPGA & CPLD
लाइफसाइकिल स्थिति सक्रिय सक्रिय
Family RTAX-S/SL Radiation-Tolerant FPGA RTAX-S/SL Radiation-Tolerant FPGA
Logic Blocks (CLBs) 21504 —
Equivalent System Gates 2000000 2000000
ASIC Gates 250000 —
Process Technology 0.15 um CMOS —
Core Supply Voltage 1.5 V [DATA_NEEDED: core supply voltage]
Speed Grade -1 [DATA_NEEDED: speed grade]
अधिकतम क्लॉक फ़्रीक्वेंसी 649 MHz (family max, Jotrin listing) —
Programmability One-Time Programmable (antifuse) —
Configuration Live at power-up, single-chip One-time programmable antifuse, live at power-up
Embedded Memory Embedded SRAM with built-in FIFO control logic 540 kbits with optional EDAC protection
Radiation Tolerance Radiation-tolerant (space-flight qualified family) —
पैकेज 624-pin Ceramic Column Grid Array (CCGA / CGA-624, ceramic) CG624 ceramic package
माउंटिंग प्रकार Surface Mount —
ऑपरेटिंग तापमान [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
I/O Count [DATA_NEEDED: user I/O count] —
RoHS स्थिति [DATA_NEEDED: RoHS status] —
Logic Cells (CLBs) — 21504
Technology — CMOS antifuse (nonvolatile)
User I/Os (maximum) — 684
Total Ionizing Dose (TID) — 300 krad (Si) functional / 200 krad (Si) parametric
Single-Event Upset Rate — Less than 1E-10 errors per bit-day
Embedded SRAM Features — Built-in FIFO control logic
Clock Architecture — Segmentable clock structures
Routing — Chip-wide highway routing, carry logic
Application Domain — Space-flight systems
I/O Supply Voltage — [DATA_NEEDED: I/O supply voltage]
System Frequency (typical) — [DATA_NEEDED: system frequency]

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