RTAX250SL-LG624V vs RTAX250S-CG624E तुलना
विस्तृत दोनों ओर की तुलना RTAX250SL-LG624V द्वारा Microchip Technology और RTAX250S-CG624E द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
RTAX250SL-LG624V - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-LG624V ✓ सक्रियMicrochip Technology
RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250S-CG624E ✓ सक्रियविशेषता तुलना
| पैरामीटर | RTAX250SL-LG624V | RTAX250S-CG624E |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Equivalent System Gates | 250000 gates | — |
| Configurable Logic Blocks (CLBs) | 2816 | — |
| Logic Cells | 4224 | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| User I/O | 248 | — |
| पैकेज | 624-pin LGA (LG624) | — |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-S radiation-tolerant FPGA |
| Program Technology | Anti-fuse, one-time programmable | — |
| Configuration | Live at power-up, single chip | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Radiation Tolerance | Radiation-tolerant, SEU-mitigated (SL variant) | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| RoHS स्थिति | [DATA_NEEDED: RoHS Status] | — |
| ऑपरेटिंग तापमान | [DATA_NEEDED: Operating Temperature] | -55C to +125C |
| System Gates | — | 250000 gates |
| Logic Cells (CLBs) | — | 2816 |
| Maximum Toggle Frequency | — | 649 MHz |
| Logic Family | — | CMOS |
| CLB Combinatorial Delay (max) | — | 0.930 ns |
| Package Type | — | CCGA-624 (ceramic column grid array, 624 pins) |
| Programming Technology | — | Antifuse (one-time programmable) |
| SEU Hardening | — | SEU-hardened registers, no external TMR required |
| SEU Immunity | — | Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day |
| Power-Up Behavior | — | Live at power-up (true single-chip) |
| Target Application | — | Space-flight systems |