RTAX250SL-LG624V vs RTAX250S-CG624E Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX250SL-LG624V sa pamamagitan ng Microchip Technology at RTAX250S-CG624E sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX250SL-LG624V - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-LG624V ✓ NakahandaMicrochip Technology
RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250S-CG624E ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX250SL-LG624V | RTAX250S-CG624E |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Equivalent System Gates | 250000 gates | — |
| Configurable Logic Blocks (CLBs) | 2816 | — |
| Logic Cells | 4224 | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| User I/O | 248 | — |
| Packhaging | 624-pin LGA (LG624) | — |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-S radiation-tolerant FPGA |
| Program Technology | Anti-fuse, one-time programmable | — |
| Configuration | Live at power-up, single chip | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Radiation Tolerance | Radiation-tolerant, SEU-mitigated (SL variant) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS Status] | — |
| Temperature na Operasyon | [DATA_NEEDED: Operating Temperature] | -55C to +125C |
| System Gates | — | 250000 gates |
| Logic Cells (CLBs) | — | 2816 |
| Maximum Toggle Frequency | — | 649 MHz |
| Logic Family | — | CMOS |
| CLB Combinatorial Delay (max) | — | 0.930 ns |
| Package Type | — | CCGA-624 (ceramic column grid array, 624 pins) |
| Programming Technology | — | Antifuse (one-time programmable) |
| SEU Hardening | — | SEU-hardened registers, no external TMR required |
| SEU Immunity | — | Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day |
| Power-Up Behavior | — | Live at power-up (true single-chip) |
| Target Application | — | Space-flight systems |