EP1810JC-45 vs EP1810GI-45 Perbandingan
Perbandingan bersamaan detil EP1810JC-45 dari Altera dan EP1810GI-45 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP1810JC-45 | EP1810GI-45 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Obsolete |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | — |
| Family | EP1810 (Classic EPLD Family) | Altera Classic EPLD |
| Macrocells | 48 | 24 |
| Equivalent Gates | 2100 gates | — |
| Dedicated Inputs | 12 | — |
| I/O Pins | 48 | — |
| Total User I/O | 60 | — |
| Propagation Delay (tpd) | 45 ns | 45 ns |
| Frekuensi Bawah Maximum | 33.3 MHz | — |
| Technology | CMOS, UV-erasable | CMOS |
| Maximum Supply Voltage | 5.25 V | — |
| Paket | PLCC-68 (QCCJ, J-Lead, windowed ceramic) | — |
| Jumlah Pin | 68 | 68 |
| Package Code | QCCJ | — |
| Temperature Grade | Commercial | — |
| Tipe Mounting | Surface Mount | Through-Hole |
| Status RoHS | [DATA_NEEDED: RoHS compliance not stated in verified data] | Non-compliant (ceramic PGA) |
| Device Type | — | UV Erasable Programmable Logic Device (EPLD) |
| Flip-Flops | — | 48 |
| Speed Grade | — | -45 |
| Package Type | — | Ceramic Pin Grid Array with UV window |
| Programmable | — | Yes (UV-erasable, electrically programmable) |
| Lead-Free | — | No |
| Suhu Kerja | — | [DATA_NEEDED: operating temperature range] |
| Tegangan Pemuat | — | [DATA_NEEDED: VCC range] |