EP2A25F672I-9 vs EP2A25F672I6 Perbandingan

Perbandingan bersamaan detil EP2A25F672I-9 dari Intel dan EP2A25F672I6 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP2A25F672I-9 EP2A25F672I6
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Family APEX II APEX II
Logic Elements (typical) 25,000 —
Maximum System Gates [DATA_NEEDED: maximum system gates] —
Embedded System Blocks (ESB) Memory 1,125 Kbits —
Maximum User I/O Pins [DATA_NEEDED: maximum user I/O pins] —
Number of PLLs 4 —
Process Technology 0.18 µm CMOS 0.18 µm CMOS
Core Voltage 1.5 V / 1.8 V (speed-grade dependent) 1.5 V
Operating Temperature Grade Industrial (-40 °C to +100 °C junction) —
Speed Grade -9 6
Paket 672-pin FCBGA (FineLine BGA) 672-ball FineLine BGA (FBGA-672)
Tipe Mounting Surface Mount (BGA) Surface Mount (BGA)
Tingkat Sensitivitas Kekeringan (MSL) 3 (per Vyrian listing) —
Peak Reflow Temperature 220 °C (per Vyrian listing) —
Configuration Method JTAG / serial configuration EPROM External SRAM configuration device (EPC series)
Supported I/O Standards LVTTL, LVCMOS, LVDS, PCI —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Legacy Status Obsolete - consult Altera / Intel FPGA archive for documentation —
Logic Elements (typical gates) — 25,000
Fabric Architecture — SRAM-based LUT
Temperature Grade — Industrial (-40 °C to +100 °C ambient)
Embedded Memory — Embedded System Blocks (ESB), dual-port RAM / CAM
DSP Blocks — MultiCore dedicated multipliers
Boundary Scan — JTAG (IEEE 1149.1) compliant
Clock Management — Dedicated PLL / clock tree circuitry
I/O Bank Count — [DATA_NEEDED: number of user I/O banks]
Lead-Free — [DATA_NEEDED: lead-free status]
Level MSL — [DATA_NEEDED: moisture sensitivity level]

Spek dan Sumber

Buka Semua Produk Buat BOM Ajukan Diskon